PCIe Verification Engineer

Scaledge Technology; Bengaluru; On-site; INR 1,500,000 - 2,100,000; Full time

Job summary

Scaledge Technology in Bengaluru, India, is seeking an experienced PCIe Verification Engineer to own verification of PCIe IPs and SoC-level environments. You will design and implement advanced UVM-based testbenches for next-generation silicon and collaborate with design and validation teams to enable first-pass silicon success.

The role requires deep expertise in PCIe protocols, SystemVerilog, assertions, and coverage-driven verification, with hands-on experience using VCS, Xcelium or Questa.

Qualifications

• Experience performing PCIe protocol verification on IP/SoC designs.
• Strong knowledge of UVM-based verification environments.
• Experience building coverage models and assertions (SVA).

Responsibilities

• Develop verification plans for PCIe IP/sub-systems and SOC environments.
• Create and enhance UVM/SystemVerilog based testbenches.
• Develop test scenarios, coverage models, and debug verification issues.
• Collaborate with design and validation teams to ensure silicon success.
• Analyze functional and code coverage and drive closure.

Skills

PCIe Protocol Verification Gen3/Gen4/5

SystemVerilog and UVM

Verification Methodology, Assertions (

Coverage-driven Verification

Simulation/debug tools: VCS, Xcelium,/

SoC/IP verification flows

Tools

VCS

Xcelium

Questa

Job description

Are you passionate about cutting-edge SoC/IP verification and high-speed interfaces? We are looking for an experienced PCIe Verification Engineer to join our growing team and work on next-generation semiconductor products.

Key Responsibilities:

• Develop and execute verification plans for PCIe IP/Sub-systems and SoC-level environments.
• Build and enhance UVM/SystemVerilog-based verification environments.
• Create test scenarios, assertions, coverage models, and debug complex verification issues.
• Work closely with design, architecture, and validation teams to ensure first-pass silicon success.
• Analyze functional and code coverage and drive closure activities.
• Participate in reviews of specifications, test plans, and verification strategies.

Required Skills:

• Strong expertise in PCIe Protocol Verification (Gen3/Gen4/Gen5 preferred).
• Hands-on experience with SystemVerilog and UVM.
• Good understanding of Verification Methodology, Assertions (SVA), and Coverage-driven Verification.
• Experience with simulation and debugging tools such as VCS, Xcelium, or Questa.
• Knowledge of SoC/IP verification flows and industry-standard verification practices.
• Strong debugging, analytical, and problem-solving skills.

Preferred Qualifications:

• Experience with PCIe Compliance Testing.
• Exposure to high-speed protocols such as AXI, CXL, DDR, Ethernet, or USB.
• Knowledge of scripting languages like Python, Perl, or Shell.