Memory Systems Performance & Workload Architect - SMTS

1840 Micron Tech. OP India LLP; Bengaluru; On-site; INR 2,000,000 - 3,000,000; Full time

Job summary

1840 Micron Tech. OP India LLP in Bengaluru is seeking a qualified candidate to lead memory systems architecture focused on workload-driven strategies across mobile and server platforms. Applicants should have a minimum of 15 years of experience in performance engineering and workload analysis.

The role includes responsibilities such as creating benchmarking frameworks and driving optimizations across the hardware and software stack. A bachelor's degree in Computer Science or related field is essential.

Qualifications

• 15–24+ years in memory systems, performance engineering, or system architecture.
• Proven expertise in workload analysis and workload characterization at scale for servers and mobiles.
• Strong programming experience: Python, C/C++, and system-level tooling.

Responsibilities

• Define industry-leading benchmarking framework for Mobile and Server workloads.
• Lead deep dives using PMU counters, perf, eBPF.
• Drive system-level trade-off analysis to guide product decisions.

Skills

Workload analysis

Python

C/C++

Benchmarking

Performance engineering

Education

Bachelor’s degree in Computer Science, Electrical Engineering, or related field

Tools

Linux performance tools

SPEC

MLPerf

Job description

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Lead Micron’s workload‑driven memory architecture and performance strategy across mobile and server‑class platforms, shaping the future of DRAM, LPDDR, and HBM based memory systems. Own the end‑to‑end vision for workload characterization, benchmarking, and performance modeling, translating real‑world application behavior into next‑generation memory architecture, product features, and ecosystem innovations.

Drive cross‑organizational alignment spanning silicon, controllers, firmware, OS, hyperscalers, and industry partners, establishing Micron as a leader in workload‑informed memory design.

Role Type: DMTS/SMTS Domain: Memory Systems Architecture, Workload Analysis, Performance Engineering for servers and mobiles.

Key Responsibilities

• Benchmarking & Workload Characterization
  • Define industry‑leading benchmarking framework for Mobile (Geekbench, PCMark, MLPerf Mobile, real app traces, etc.) and Server (SPEC CPU, SPECrate, STREAM, MLPerf, database/cloud workloads).
  • Characterize memory bandwidth, latency, QoS, tail latency, access patterns (locality, working set, read/write mix), NUMA behavior, cache interaction, memory‑level parallelism.
  • Define and maintain representative workload suites for customer scenarios.
• Root Cause Analysis & Optimization
  • Lead deep dives using PMU counters, perf, eBPF, ftrace, ARM Streamline / VTune equivalents.
  • Identify bottlenecks in memory controller scheduling, DRAM timing and row‑buffer locality, cache/memory interaction.
  • Drive optimizations across Kernel (NUMA, huge pages, memory policies), Firmware / BIOS tuning, Application‑level performance tuning.
• Architecture & System-Level Innovation
  • Drive system‑level trade‑off analysis (performance, power, cost, scalability) to guide product decisions.
  • Influence memory controller policies (scheduling, QoS, fairness) and evolve heterogeneous/tiered memory hierarchies.
• Modeling & Predictive Analytics
  • Establish advanced frameworks for performance modeling, analytical simulation, and trace‑driven workload replay at scale.
  • Lead what‑if exploration for future workloads (AI‑first systems) and scaling across memory configurations (channels, ranks, interleaving, bandwidth).
  • Translate models into product requirements, performance targets, and customer‑facing guidance.
• Cross-Stack Optimization
  • Drive end‑to‑end optimizations across application → OS → firmware → hardware stack.
  • Influence Linux kernel memory management (NUMA, huge pages, scheduling), data placement and memory tiering strategies.
  • Partner with ecosystem teams to optimize AI frameworks, databases and virtualization platforms for memory efficiency and performance.

Minimum Qualifications

• 15–24+ years in memory systems, performance engineering, or system architecture.
• Proven expertise in workload analysis and workload characterization at scale for servers and mobiles.
• Strong programming experience: Python, C/C++, and system‑level tooling.
• Deep experience with benchmarking suites (SPEC, MLPerf, STREAM, and real‑world workloads) and Linux performance tools (perf, eBPF, PMU‑based profiling).
• Demonstrated impact on architecture decisions and product roadmaps through cross‑functional leadership.

Ideal Attributes

• Visionary thinker who connects workload trends to architecture and product strategy.
• Strong analytical, modeling, and data‑driven decision‑making capability.
• Exceptional ability to influence at executive and cross‑organizational levels.
• Track record of industry impact (ecosystem leadership, standards, publications, or open source).
• Passion for innovation in next‑generation memory systems.

Basic Qualifications

• Bachelor’s degree in Computer Science, Electrical Engineering, or related field with 15+ years of experience, or Master’s degree with 14+ years of experience, or PhD with 12+ years of experience.
• 5+ years of experience with programming languages such as Python, C, C++, or Java.

Preferred Skills

• Experience with AI/ML workloads (LLMs, recommendation systems, training clusters) and performance optimization.
• Expertise in databases and cloud‑native systems (RocksDB, MySQL/PostgreSQL, Redis/Memcached) and microservices.
• Expertise in performance modeling, simulation, and trace‑driven workload replay frameworks.
• Familiarity with ARM and x86 system architectures and performance tooling.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.