Lead IO Characterization Engineer

LeadSOC Technologies Pvt Ltd; Bengaluru; On-site; INR 4,200,000 - 7,200,000; Full time

Job summary

LeadSOC Technologies Pvt Ltd in Bengaluru seeks a technically strong Lead IO Characterization Engineer to drive characterization, validation, and performance analysis of I/O libraries and interface circuits. The role covers electrical characterization, timing and power analysis, PVT corner validation, and development of characterization flows for robust I/O performance across technologies.

The candidate will lead debugging of discrepancies, generate SPICE-based analyses, and collaborate with

Qualifications

• 6–12 years of hands-on IO characterization, standard-cell, or custom circuit characterization.
• Strong understanding of IO circuits: GPIOs, buffers, level shifters, multi-voltage interfaces.
• Expertise in SPICE-based simulation and characterization methodologies.
• Familiarity with Liberty timing and power models and characterization validation.
• Proficiency in scripting for automation and regression flows.

Responsibilities

• Lead characterization of I/O libraries, including buffers, GPIOs, and level shifters.
• Develop characterization plans across PVT corners and process nodes.
• Characterize timing, power, leakage, drive strength, slew, and noise.
• Generate and validate timing and power models, including Liberty models.
• Perform SPICE-based simulations and analyze electrical behavior across conditions.
• Debug discrepancies, waveform issues, and corner-specific failures.
• Collaborate with circuit design, layout, and silicon validation teams.
• Develop characterization scripts, automation frameworks, and regression flows.
• Support sign-off, library qualification, and release readiness.
• Lead technical reviews and mentor engineers to improve quality.

Skills

IO characterization

Standard-cell characterization

Custom circuit characterization

SPICE-based simulations

PVT analysis

Scripting (Tcl/Python/Perl)

Debugging simulations

Transistor-level behavior

Education

BE/BTech in Electronics or Electrical Engineering

M.E./M.Tech in Electronics or VLSI (preferred)

Tools

Synopsys SiliconSmart

Cadence Liberate

Job description

We are looking for a technically strong Lead IO Characterization Engineer to drive characterization, validation, and performance analysis of I/O libraries and interface circuits. The role involves electrical characterization, timing and power analysis, PVT corner validation, and characterization flow development to ensure robust I/O performance across process technologies.

Key Responsibilities

• Lead characterization of I/O libraries, including input/output buffers, GPIOs, level shifters, and related interface circuits.
• Develop and execute characterization plans across process, voltage, and temperature (PVT) corners.
• Characterize timing, power, leakage, output drive strength, slew, capacitance, and noise-related parameters.
• Generate and validate timing and power models, including Liberty (.lib) models, where applicable.
• Perform SPICE-based simulations and analyze electrical behavior across operating conditions.
• Debug characterization discrepancies, waveform anomalies, and corner-specific failures.
• Validate I/O cell behavior against electrical specifications and design requirements.
• Collaborate with circuit design, library development, layout, EDA, and silicon validation teams.
• Develop and optimize characterization scripts, automation frameworks, and regression flows.
• Support characterization sign-off, library qualification, and release readiness.
• Drive technical reviews, mentor engineers, and improve characterization quality and execution efficiency.

Required Technical Skills

• 6–12 years of hands-on experience in IO characterization, standard-cell characterization, or custom circuit characterization.
• Strong understanding of IO circuits, including GPIOs, input/output buffers, level shifters, and multi-voltage interfaces.
• Expertise in SPICE-based circuit simulation and characterization methodologies.
• Strong knowledge of PVT analysis, timing arcs, propagation delay, transition time, power, leakage, and capacitance characterization.
• Experience with characterization tools and flows such as Synopsys SiliconSmart, Cadence Liberate, or equivalent.
• Familiarity with Liberty timing and power models and characterization validation.
• Proficiency in scripting and automation using Tcl, Python, Perl, or equivalent.
• Strong debugging skills for simulation convergence, waveform analysis, and characterization inconsistencies.
• Understanding of transistor-level circuit behavior, parasitics, and process-dependent performance variation.

Preferred Qualifications

• Experience characterizing IO libraries for advanced technology nodes, including FinFET-based processes.
• Exposure to foundry technologies such as TSMC and Samsung.
• Experience with multi-voltage IO, high-drive cells, ESD-aware circuit requirements, and reliability constraints.
• Knowledge of statistical characterization, variation analysis, and model correlation.
• Exposure to silicon correlation and post-silicon validation.
• B.E./B.Tech or M.E./M.Tech in Electronics, Electrical Engineering, VLSI, or a related discipline.