Lead Hardware Engineer - DFT IP R&D

Cadence Design Systems, Inc.; Dadri; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

Cadence Design Systems, Inc. in Noida invites applications for Lead Hardware Engineer - DFT IP R&D. The role focuses on RTL/DFT design and verification within the MODUS DFT software solution, offering exposure to a broad toolset and advanced DFT techniques.

You will design and verify RTL/test benches, support product engineers, and participate in high-impact research to push the boundaries of DFT technology. A strong foundation in electronics and programming is required.

Qualifications

• Proficient in RTL design using Verilog and SystemVerilog.
• In-depth knowledge of front-end EDA tools (Verilog/SV simulators, linters, CDC checkers).
• Experience with SystemVerilog assertions, checkers, and advanced verification techniques.
• Knowledge of scripting languages, particularly Perl or Python is highly desirable.
• Knowledge of DFT methodologies is a plus.
• Strong foundational knowledge of data structures and algorithms.
• Familiarity with synthesis, static timing analysis (STA).
• Excellent written and verbal communication and presentation skills.
• Experience and understanding of EDA tool development concepts is a plus.

Responsibilities

• Designing and verifying Verilog/SystemVerilog/UVM RTL and test benches for DFT IP features, including new DFT IPs, full scan, compressed/uncompressed scan, memory BIST, JTAG, IEEE 1500, and boundary scan at block and SoC levels.
• Providing R&D support to application and product engineers, including problem analysis, debugging, and the development of new features to optimize synthesis results for timing, area, and power.
• There is a significant research element to the work that Cadence does that is truly innovative; we don’t know what the answers are when we start out!
• Mentoring and support will be provided to the successful candidate to both enable contribution to the large EDA problem domain and to develop their problem-solving skills into professional engineering skills.

Skills

RTL design

Verilog

SystemVerilog

DFT tooling

UVM

Perl/Python

EDA tools

Design for Test

Computer architecture

Education

M.Tech / ME in EE/ECE/CS

B.Tech / BE in EE/ECE/CS

Tools

Verilog/SystemVerilog simulators

Linters

CDC checkers

Job description

NOIDA

BANGALORE

Full time

R49107

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Position: Lead Hardware Engineer - DFT IP R&D

Location: Noida

Experience: 4-6 Years

Job Description

Cadence Design Systems is looking for a highly motivated software and hardware engineer to work as a member of the R&D staff on Cadence’s MODUS DFT software solution. MODUS is a complete product that encompasses Design for Test Solution for Achieving High Coverage, Reduced Test Time, and Superior PPA. The product breadth means we are looking for skilled and motivated candidates with backgrounds in RTL design, DFT architecture, computer architecture, verification, RTL compilation, placement, static timing analysis, power analysis, routing, extraction, and optimization. You will be part of a team responsible for creating the innovative technologies required for technology leadership in the DFT space. This position will encourage building of a solid foundation in logic circuits and gentle entry into larger DFT IP tool development. Development responsibilities include designing, developing, troubleshooting, debugging and supporting the MODUS software product.

Job Responsibilities:

You will play a key role in developing cutting-edge design-for-testability (DFT) tools, contributing to improved usability and quality through feature enhancement and rigorous verification. The role’s day to day responsibilities cover:

Designing and verifying Verilog/SystemVerilog/UVM RTL and test benches for DFT IP features, including new DFT IPs, full scan, compressed/uncompressed scan, memory BIST, JTAG, IEEE 1500, and boundary scan at block and SoC levels.Providing R&D support to application and product engineers, including problem analysis, debugging, and the development of new features to optimize synthesis results for timing, area, and power.

There is a significant research element to the work that Cadence does that is truly innovative; we don’t know what the answers are when we start out!

Mentoring and support will be provided to the successful candidate to both enable contribution to the large EDA problem domain and to develop their problem-solving skills into professional engineering skills.

Job Qualifications:

• Proficient in RTL design using Verilog and SystemVerilog.

• In-depth knowledge of front-end EDA tools (Verilog/SV simulators, linters, CDC checkers).

• Experience with SystemVerilog assertions, checkers, and advanced verification techniques.

• Knowledge of scripting languages, particularly Perl or Python is highly desirable.

• Knowledge of DFT methodologies is a plus.

• Strong foundational knowledge of data structures and algorithms.

• Familiarity with synthesis, static timing analysis (STA).

• Excellent written and verbal communication and presentation skills.

• Experience and understanding of EDA tool development concepts is a plus.

Position Qualifications:

• M.Tech, M.E, B.Tech, B.E. in EE/ECE/CS or Equivalent

• Good understanding of Digital Electronics.

• Prior knowledge of Verilog/System Verilog and EDA tools required.

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Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.

Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.

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Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.