Lead Product Engineer

Cadence Design Systems; Bengaluru; On-site; INR 2,500,000 - 4,200,000; Full time

Job summary

Cadence Design Systems in Bengaluru seeks a Product Engineer to perform Genus synthesis work and improve PPA for latest digital ASIC designs. You will analyze internal Genus flows, verify correctness, and explore optimal solutions while supporting field engineers and customers.

The role requires experience with Cadence synthesis/physical design flows, HDL familiarity, and scripting skills (Perl/Tcl/Shell). BE/BTech or higher is expected, with a focus on digital implementation and timing closure.

Qualifications

• Experience in design and EDA with an emphasis on Cadence tools of Synthesis, Physical Design & timing closure at 20nm or below nodes.
• Prior Designer, Product Engineering or Application Engineering experience in digital implementation, especially synthesis.
• Understand industry challenges in digital implementation & sign off domain with exposure to 28nm & below foundry process nodes.
• Industry experience with EDA tools in the IC digital implementation flow, preferably on Genus and Innovus.
• Experience in Logic Design and Synthesis, Formal Verification, Low Power design, Physical Design and Timing Closure for block level and top level designs.
• Automation skills using Perl, Tcl and shell scripting essential.
• Knowledge of HDL – Verilog or System Verilog is preferred.
• Must have logic design and timing closure skills.
• Strong analysis skills required to debug complex timing closure, logical and physical design problems.

Responsibilities

• Perform Product Engineering work for Genus Synthesis Solution (Genus), a logic synthesis software used for synthesizing a design described in a high-level language into logic gates, to achieve best-in-class Power, Performance & Area (PPA) for latest digital ASICs
• Understand the internal flow within the Genus for newly developed features and verify the correctness and perform experiments to determine an optimal solution
• Solve new and challenging problems in physical aware synthesis space with the goal to bridge the gap between logic synthesis and place and route
• Support the field engineers in Cadence Design Systems, Inc. and its customers in using Genus.
• In addition, interface between R&D and customer as the first line of support for the R&D and the customers
• Provide support to verify the interoperability of Genus with other digital logic software tools within Cadence Design Systems, Inc. to provide seamless flows
• Understand the future requirements of the software by interfacing with the internal and external customers of Genus and document the Product Requirement Specifications (PRS) for newly developed features using the standard documentation software

Skills

Genus Synthesis

Innovus

Verilog/SystemVerilog

Timing closure analysis

Root-cause analysis

Perl/Tcl/Shell scripting

Education

BE/BTech/ME/MS/MTech or equivalent

Tools

Genus

Innovus

Verilog/SystemVerilog

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day.

Job responsibilities:

• Perform Product Engineering work for Genus Synthesis Solution (Genus), a logic synthesis software used for synthesizing a design described in a high-level language into logic gates, to achieve best-in-class Power, Performance & Area (PPA) for latest digital ASICs
• Understand the internal flow within the Genus for newly developed features and verify the correctness and perform experiments to determine an optimal solution
• Solve new and challenging problems in physical aware synthesis space with the goal to bridge the gap between logic synthesis and place and route
• Support the field engineers in Cadence Design Systems, Inc. and its customers in using Genus.
• In addition, interface between R&D and customer as the first line of support for the R&D and the customers
• Provide support to verify the interoperability of Genus with other digital logic software tools within Cadence Design Systems, Inc. to provide seamless flows
• Understand the future requirements of the software by interfacing with the internal and external customers of Genus and document the Product Requirement Specifications (PRS) for newly developed features using the standard documentation software

Preferred Qualifications:

• Experience in design and EDA with an emphasis on Cadence tools of Synthesis, Physical Design & timing closure at 20nm or below nodes
• Prior Designer, Product Engineering or Application Engineering experience in digital implementation, especially synthesis
• Understand industry challenges in digital implementation & sign off domain with exposure to 28nm & below foundry process nodes
• Industry experience with EDA tools in the IC digital implementation flow, preferably on Genus and Innovus
• Experience in Logic Design and Synthesis, Formal Verification, Low Power design, Physical Design and Timing Closure for block level and top level designs
• Automation skills using Perl, Tcl and shell scripting essential
• Knowledge of HDL – Verilog or System Verilog is preferred
• Must have logic design and timing closure skills
• Strong analysis skills required to debug complex timing closure, logical and physical design problems.
• Ability to perform root-cause analysis to suggest solutions to customers and provide feedback to R&D

Qualifications

BE/BTech/ME/MS/MTech or equivalent

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