Lead Design Engineer

Cadence Design Systems, Inc.; Dadri; On-site; INR 1,800,000 - 3,200,000; Full time

Job summary

Cadence Design Systems, Inc. in Pune, Bangalore and Noida is seeking senior engineers for the Xtensa processor team to join our R&D groups.

This is an exciting opportunity to contribute to world-class processor design and verification within Cadence's leadership in computational software, semiconductor IP, and system verification hardware. Lead Engineer roles include RTL implementation of microprocessor cores and sub-systems, or design verification with UVM/SVA monitoring.

Qualifications

• 4+ years of Design or Design Verification experience.
• BS/MS in EE/Computer Engineering or a related major.
• Strong understanding of digital design and verification fundamentals.
• Experience collaborating in teams and mentoring junior engineers.
• Proficiency in Verilog, SystemVerilog, and EDA tools.
• Knowledge of ISO 26262 safety concepts.
• C and assembly language proficiency.
• Excellent communication skills; able to convey complex ideas.
• Exposure to netlist/gate-level debugging and embedded software basics.

Responsibilities

• RTL implementation of microprocessor cores, multiprocessor subsystems, and peripherals.
• Verifying microprocessor cores and subsystems with UVM/SVA tests.
• Develop test plans, diagnostics, and coverage analysis.
• Collaborate with RTL Design and EDA teams to meet timing, area and power goals.

Skills

Design verification

Verilog

SystemVerilog

C language

Embedded software

Scripting languages

Digital design fundamentals

Micro-architecture knowledge

Education

BS/MS in EE/Computer Engineering or related major

Job description

PUNE

BANGALORE

NOIDA

Full time

R51051

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence Tensilica CPU/DSP Processor Team is hiring senior engineers to join our R&D teams in Pune, Bangalore and Noida. This is an amazing opportunity to work in an impactful job at a world leader in computational software, semiconductor design IP, and system verification hardware. Come be part of this great Processor team where you can make an impact that is visible.

Lead Engineer positions are for one of the two roles: (a) Perform as a member of the Logic Design Team for Xtensa processors. Responsible for the RTL implementation of microprocessor cores, multiprocessor sub-systems and their peripherals. Implement the micro-architecture in Verilog RTL, simulate and debug its functions and run synthesis, place & route and other Electronic Design Automation scripts to meet timing, area, and power goals. Assist with developing test plans; writing functional diagnostics; debugging failures; and analyzing coverage information. Work closely with various Design Verification and Electronic Design Automation teams.(b) Perform as a member of the Design Verification Team for Xtensa processors. Responsible for verification of microprocessor cores, multiprocessor sub-systems and their peripherals. Assist with developing test plans, writing functional assembly diagnostics, UVM/SVA monitors, debugging failures, and analyzing coverage information. Work closely with various RTL Design and Electronic Design Automation teams.

Required Skills and Experience:

• 4+ years of Design or Design Verification experience

• BS/MS in EE/Computer Engineering or a similar major.

• Deep understanding of Digital Design and/or Design Verification fundamentals

• Experience in working as part of a team, or guiding/mentoring junior engineers

• Excellent knowledge of computer architecture/micro-architecture and design verification fundamentals

• Expertise with Verilog and popular EDA simulation, SystemVerilog assertions and functional coverage

• Good working knowledge of scripting languages like Python, Perl, Tcl, Unix shell or similar languages

• Knowledge of technical safety concepts and requirement specifications according to ISO 26262

• Proficient with C language and assembly language

• Excellent written and oral communication skills necessary

• Exposure to debugging netlist/gate level simulation.

• General understanding of embedded SW.

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Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.

Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.

Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.