Principal Product Validation Engineer

Cadence Design Systems, Inc.; Dadri; On-site; INR 1,500,000 - 2,100,000; Full time

Job summary

Cadence Design Systems, Inc. in Noida is seeking a talented engineer with strong HDL knowledge and experience in verification of complex digital systems. You will work with Verilog/VHDL, SystemVerilog, UVM and C++ to debug design/verification issues and contribute to SoC verification environments.

The role emphasizes scripting for process automation and hands-on use of EDA tools to enhance verification flows. This is a full-time position located in Noida, India.

Qualifications

• Electrical, Electronics or Computer Science Engineer with very good understanding of HDLs (Verilog and/ or VHDL).
• Experience in simulation/emulation using these languages with knowledge of EDA tools (Cadence/ Others) focusing on debugging design/verification problems.
• Experience in process automation with scripting.
• Experience with SystemVerilog, C++, UVM.
• Experience with Functional Verification of complex digital systems (SoC verification) with an HVL like SystemVerilog.
• Experience designing and implementing complex functional verification environments.

Skills

HDL Verilog/VHDL

SystemVerilog

C++

UVM

SoC Verification

Debugging HDL/verification

Tools

Cadence/Other EDA tools

Job description

NOIDA

Full time

R44006

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

• The person should be an Electrical, Electronics or Computer Science Engineer with very good understanding of HDLs (Verilog and/ or VHDL).

• Prior experience in simulation/emulation using these languages. He/ she should have a good working knowledge of EDA tools (Cadence/ Others) with focus towards debugging design/ verification problems using these tools.

• Experience in process automation with scripting.

• Experience with SystemVerilog, C++, UVM.

• Experience with Functional Verification of complex digital systems, e.g. SoC Verification, with a Hardware Verification Language (HVL) like SystemVerilog.

• Experience designing and implementing complex functional verification environments is required.

• Knowledge of protocols like PCIe, USB3/4, DP an added advantage.

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Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.

Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.

Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.