IP Design Engineer – RTL | SoC | Embedded Processors

Texas Instruments; Bengaluru; On-site; INR 1,200,000 - 1,800,000; Full time

Benefits offered by this job

Access to world-class EDA tools

Opportunities for cross-functional collaboration

Growth opportunities in cutting-edge technology

Job summary

Texas Instruments is looking for an IP Design Engineer with expertise in RTL implementation and micro-architecture development. This role involves owning the full IP development lifecycle of cutting-edge SoCs targeting automotive and industrial applications. Candidates should have a Bachelor's/Master's degree in Electrical Engineering and 3–5 years of experience in RTL design. Join a high-impact team to shape the architecture of next-generation automotive and industrial systems in Bengaluru, India.

Qualifications

• 3–5 years of strong hands-on RTL design experience with IP designs for microcontrollers.
• Design experience with high-performance Bus Architectures and communication interfaces.
• Strong knowledge of multi-clock domain design and verification tools.

Responsibilities

• Lead micro-architecture development and RTL implementation of IPs.
• Perform quality checks on implemented RTL and drive synthesis/timing closure.
• Collaborate across functional teams responsible for IP/SoC development.

Skills

RTL design experience

Micro-architecture development

Scripting and automation

Clock Domain Crossing analysis

Cross-functional collaboration

Education

Bachelor's/Master's degree in Electrical Engineering

Tools

CDC analysis tools

EDA tools

Job description

Architect the Intelligence Inside Tomorrow's Chips

At Texas Instruments, our engineers don't just write RTL — they architect and implement the IPs that power the world's most advanced automotive and industrial systems. If you're a digital design expert who thrives on micro-architecture development, RTL implementation, and timing closure, this is your opportunity.

About the Role

We are looking for a talented IP Design Engineer – RTL | SoC | Embedded Processors to join our Processors and Application Specific Microcontroller (ASM) Business Unit — part of TI's Embedded Processors group.

You will own the full IP development lifecycle — from micro-architecture and RTL implementation to synthesis, timing closure, and SoC integration support — for cutting‑edge SoCs spanning 5nm technologies targeting automotive ADAS, zonal controllers, domain controllers, and industrial real‑time control applications.

This is a high-ownership, high-impact role where your RTL work directly shapes the architecture and performance of TI's most advanced embedded processor designs.

• Lead micro-architecture development and RTL implementation of IPs in close collaboration with Systems and Architecture teams
• Plan and execute high-quality IP development as an RTL engineer with full ownership
• Perform quality checks on implemented RTL — LINT, CDC, and DFT rules — with clear documentation of exceptions and waivers
• Drive synthesis and timing closure of implemented IPs along with equivalence checks
• Provide quality documentation of IP implementation and deliverables through systematic reviews
• Work closely with IP and SoC verification teams to achieve high-quality IP delivery
• Provide support for SoC integration, constraint development, and timing closure
• Contribute to and drive quality and cycle time improvement methodologies as part of the development process
• Collaborate across functional teams responsible for IP/SoC development from spec to silicon
• Bachelor's/Master's degree in Electrical Engineering, Electronics, or related field
• 3–5 years of strong hands‑on RTL design experience with IP designs for microcontrollers
• Design experience with high-performance Bus Architectures, high-speed communication interfaces, and Analog Mixed Signal IPs
• Strong knowledge of multi-clock domain design and expertise in Clock Domain Crossing (CDC) analysis tools
• Proven experience in RTL synthesis and optimization for power and timing
• Experience with scripting and automation; IPXACT exposure is a bonus

Preferred Qualifications

• 3–5 years of hands‑on IP development experience with team leadership exposure
• Strong experience in micro-architecting, RTL implementation, CDC, synthesis, equivalence checks, and timing closure tools
• Experience with hardware accelerators for mathematical functions, control peripherals, networking, multimedia interfaces (display, video, graphics)
• Passion for correct-by-construct design and efficiency improvement methodologies
• Proficiency in scripting languages (Python, Perl, TCL)
• Excellent verbal and written communication skills
• Strong cross‑functional collaboration abilities across design, verification, and architecture teams

Growth: Work on 5nm SoCs powering ADAS, autonomous driving & industrial real‑time control

Impact: Your RTL IPs power millions of automotive and industrial devices globally

Learning: Access to world‑class EDA tools, micro‑architecture expertise & cutting‑edge SoC development

Innovation: Work alongside top RTL, DV, and architecture engineers in the semiconductor industry

Ready to Design the IPs That Power the Future?

If you are passionate about RTL design, SoC architecture, and building technology that powers next‑generation automotive and industrial systems — we want to hear from you!