FPGA Verification Engineer

Akkodis

Bengaluru

On-site

INR 1,200,000 - 1,800,000

Full time

14 days+
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Job summary

Akkodis Bengaluru is seeking an FPGA Firmware Engineer to perform verification activities across diverse project requirements and support on-time delivery milestones.

You will verify RTL using SystemVerilog and UVM, be familiar with VHDL RTL flows, and develop SV/UVM test environments. Experience with Questa or Modelsim is required; DO-254 verification is a plus. You will participate in tests, test-benches, and verification reviews.

Qualifications

  • Experience in RTL verification using SystemVerilog and UVM.
  • Hands-on experience with SV/UVM verification environments.
  • Awareness of FPGA design flow with VHDL RTL.
  • Knowledge of DO-254 verification is a plus.

Responsibilities

  • Develop tests and test environments using SystemVerilog UVM.
  • Create and review test plans and self-checking test benches.
  • Verify requirements and conduct requirement reviews.
  • Update verification environment for block and system levels.

Skills

SystemVerilog
UVM
RTL verification
VHDL
Questa/ModelSim
DO-254 knowledge
Test environment development
Test plan development

Tools

Questa
ModelSim

Job description

Requirement for a qualified FPGA Firmware Engineer to perform Verification activities. The engineer will work on various project requirements and provide technical support to meet critical delivery timelines and achieve project milestones.

Skillset Required:

  • Proficient in RTL verification using System Verilog (SV) and UVM
  • Awareness of FPGA design flow using VHDL as RTL language.
  • Hands on experience in developing SV/UVM verification environment.
  • Hands on experience with Questa or Modelsim or similar advanced simulation tools.
  • Hands on experience in DO-254 verification process is a plus.
  • Experience in the activities below,
  • Developing tests and test environments using System Verilog UVM, for requirement-based testing.
  • Developing test-plan, self-checking test-benches to meet the verification criteria and code coverage.
  • Requirement validation and requirement review, Test plan Review.
  • Verification environment development/update for block level and system level.
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