FPGA Design Engineer

Mirafra Technologies; Bengaluru Urban; On-site; INR 800,000 - 1,200,000; Full time

Job summary

Mirafra Technologies is looking for a proficient FPGA Designer to engage in architecture definition and implementation. The ideal candidate should have 5-8 years of FPGA design experience and proficiency in HDL languages such as Verilog, VHDL, and SystemVerilog.

Responsibilities include collaborating with various teams on design specifications and assisting in lab validation. Knowledge of Ethernet protocols and FPGA vendor tools like Vivado and Quartus is essential for success in this role.

Qualifications

• 5-8 years of relevant FPGA design experience.
• Proficiency in HDL languages: Verilog, VHDL, and SystemVerilog.
• Basic knowledge of Unix systems and scripting tools.

Responsibilities

• Participate in architecture definition, implementation, and verification phases.
• Develop detailed design specifications.
• Develop and implement block-level RTL, perform synthesis, and achieve timing closure.
• Collaborate with multi-functional teams including hardware, software, diagnostics, and signal integrity groups.
• Assist in complex subsystem-level lab bring-up, integration, and unit test validation.

Skills

Xilinx FPGA experience

Altera FPGA experience

Microsemi FPGA experience

Verilog proficiency

VHDL proficiency

SystemVerilog proficiency

Vivado hands-on experience

Quartus hands-on experience

Libero hands-on experience

Ethernet-based protocols knowledge

PCIe knowledge

AXI knowledge

Memory controllers knowledge

OTN knowledge

I2C knowledge

SPI knowledge

UART knowledge

UVM familiarity

VMM familiarity

Unix systems knowledge

Scripting tools knowledge

Job description

Responsibilities

• Participate in architecture definition, implementation, and verification phases.
• Develop detailed design specifications.
• Develop and implement block-level RTL, perform synthesis, and achieve timing closure.
• Collaborate with multi-functional teams including hardware, software, diagnostics, and signal integrity groups.
• Assist in complex subsystem-level lab bring-up, integration, and unit test validation.

Required Skills and Experience

• Experience with Xilinx, Altera, and Microsemi FPGAs
• Proficiency in HDL languages: Verilog, VHDL, and SystemVerilog
• Hands-on experience with FPGA vendor tools such as Vivado, Quartus, and Libero
• Practical knowledge of Ethernet-based protocols, PCIe, AXI, memory controllers, OTN, I2C, SPI, UART, etc
• Familiarity with simulation flows like UVM and VMM is an added advantage
• Basic knowledge of Unix systems and scripting tools
• 5-8 years of relevant FPGA design experience