FPGA RTL Designer

Greytip Software Private Limited

Bengaluru

On-site

INR 1,200,000 - 1,800,000

Full time

14 days+

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Job summary

Greytip Software Private Limited is seeking an experienced FPGA engineer in Bengaluru to drive design, verification, and debugging of FPGA-based systems. You will implement RTL, perform simulations, and optimize timing for high-speed interfaces.

The role emphasizes hands-on work with Verilog/SystemVerilog, VHDL, DSP pipelines, and FPGA platforms from major vendors, alongside debugging with industry tools.

Qualifications

  • 4 to 10 years of FPGA design/verification experience.

Skills

FPGA design
HDL development
Verilog/SystemVerilog
VHDL
DSP on FPGA
Debugging
Timing analysis
CDC (Clock domain crossing)
RTL optimization

Education

BE/B.Tech or M.E./M.Tech in Electronics, ECE, Electrical, VLSI Design, Embedded Systems

Tools

ModelSim/QuestaSim
ChipScope/ILA/SignalTap
Oscilloscopes
Logic Analyzers

Job description

Experience
  • 4 to 10 years of relevant FPGA Design/Verification experience.
  • Candidates with strong hands‑on FPGA development and debugging experience will be preferred.
Educational Qualification
  • B.E./B.Tech or M.E./M.Tech in Electronics, Electronics & Communication, Electrical Engineering, VLSI Design, Embedded Systems, or related disciplines.
  • Candidates from reputed engineering colleges and universities will be preferred.
  • Strong understanding of:
    • Combinational and Sequential Logic
    • Clock Domain Crossing (CDC)
    • Timing Analysis and Timing Closure
    • Setup Time, Hold Time, Recovery/Removal Checks
    • Slack Analysis and Timing Violation Debugging
HDL Development
  • Strong Verilog/SystemVerilog and/or VHDL coding skills
  • RTL Design, Simulation, Synthesis, and FPGA Implementation
Protocol Knowledge
  • UART, SPI, I2C
  • Ethernet
  • Added advantage:
    • JESD204B/JESD204C
    • 10G/25G/40G/100G Ethernet MAC
    • MACsec
    • IPsec
    • High‑speed serial interfaces
DSP and Signal Processing
  • Hands‑on implementation of DSP algorithms in FPGA
  • Experience with filtering, FFT, digital signal processing pipelines, and optimization techniques is highly preferred.
FPGA Platforms
  • Practical experience with FPGA boards from:
    • Xilinx/AMD
    • Intel (Altera)
Debug and Validation
  • FPGA bring‑up and board‑level debugging
  • ChipScope/ILA/SignalTap or equivalent debugging tools
  • Hardware validation and troubleshooting
  • Experience using Oscilloscopes, Logic Analyzers, and Lab Equipment
FPGA Tools
  • Experience with any of the following tools:
    • ModelSim/QuestaSim
  • Experience with additional FPGA design tools will be an added advantage.
Additional Advantages
  • RTL design for low power implementations
  • Knowledge in Partial reconfiguration
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