Lead Engineer - FPGA

CIEL HR; Khordha; On-site; INR 2,500,000 - 4,000,000; Full time

Job summary

CIEL HR is seeking an experienced FPGA Architect to design and implement high-speed interfaces (Ethernet, MIPI-CSI, PCIe, NMEA) and develop RTL in VHDL/Verilog/SystemVerilog for FPGA platforms from leading vendors. You will perform timing closure, verification, and collaborate with hardware, software, and system teams.

The role requires strong problem-solving skills, a background in embedded processors/SoC FPGA architectures, and experience with industry verification tools.

Qualifications

• Strong expertise in Ethernet, MIPI-CSI, PCIe, and NMEA protocol implementation.
• Proficiency in RTL design (VHDL/Verilog/SystemVerilog).
• Experience with FPGA platforms (Xilinx, Intel/Altera, Lattice, or Microchip).
• Familiarity with simulation and verification tools (ModelSim, Questa, Vivado, Quartus).
• Solid understanding of timing closure, synthesis, and FPGA toolchains.
• Strong problem-solving skills and ability to work in cross-functional teams.
• Experience with embedded processors and SoC FPGA architectures.
• Knowledge of high-speed board-level design and signal integrity.
• Exposure to scripting languages (Python, TCL, Perl) for automation
• Experience in aerospace domain preferred

Responsibilities

• Architect, design, and implement FPGA-based solutions for high-speed communication interfaces.
• Develop RTL code (VHDL/Verilog/SystemVerilog) and optimize for performance, area, and power.
• Perform simulation, verification, and debugging using industry-standard tools.
• Collaborate with hardware, software, and system engineering teams to integrate FPGA designs into larger systems.
• Conduct timing analysis, synthesis, and place-and-route to ensure design closure.
• Document design specifications, test plans, and results for internal and external stakeholders.
• Mentor junior engineers and contribute to design reviews.

Job description

1. Architect, design, and implement FPGA-based solutions for high-speed communication interfaces

(Ethernet, MIPI-CSI, PCIe, NMEA).

2. Develop RTL code (VHDL/Verilog/System Verilog) and optimize for performance, area, and power.

3. Perform simulation, verification, and debugging using industry-standard tools.

4. Collaborate with hardware, software, and system engineering teams to integrate FPGA designs

into larger systems.

5. Conduct timing analysis, synthesis, and place-and-route to ensure design closure.

6. Document design specifications, test plans, and results for internal and external stakeholders.

7. Mentor junior engineers and contribute to design reviews.

Required Skills & Competencies:

1. Strong expertise in Ethernet, MIPI-CSI, PCIe, and NMEA protocol implementation.

2. Proficiency in RTL design (VHDL/Verilog/SystemVerilog).

3. Experience with FPGA platforms (Xilinx, Intel/Altera, Lattice, or Microchip).

4. Familiarity with simulation and verification tools (ModelSim, Questa, Vivado, Quartus, etc.).

5. Solid understanding of timing closure, synthesis, and FPGA toolchains.

6. Strong problem-solving skills and ability to work in cross-functional teams.

7. Experience with embedded processors and SoC FPGA architectures.

8. Knowledge of high-speed board-level design and signal integrity.

9. Exposure to scripting languages (Python, TCL, Perl) for automation

10. Experience in aerospace domain preferred