Firmware Engineer II

Cadence; Bengaluru; On-site; INR 900,000 - 1,300,000; Full time

Job summary

Cadence is seeking an embedded firmware engineer to join the DDR5 PHY IP Front End Design team in Bengaluru. You will develop firmware for DDR5 PHYs using microcontrollers in a bare-metal environment, create low-level APIs, and collaborate with hardware architects to derive training algorithms and integration plans.

You will also work with the verification team to align firmware-hardware co-verification strategies, and you will develop and debug firmware in RTL-based simulations and on silicon

Qualifications

• Experience in developing bare-metal firmware for high-speed SerDes or memory interface PHY blocks.
• Strong knowledge of DDR5 JEDEC specs and DIMM configurations.
• Proficient in C for embedded software development with relevant IDEs.

Responsibilities

• Develop firmware for DDR5 PHY using microcontrollers.
• Develop firmware in C with bare-metal approach and low-level APIs.
• Collaborate with hardware designers and memory subsystem architects to derive and implement training algorithms.
• Collaborate with verification team to plan firmware-hardware co-verification.
• Develop and debug firmware in RTL-based hardware simulations (C + Verilog).
• Develop and debug on silicon bring-up boards.

Skills

DDR5 knowledge

Bare-metal firmware

C programming

RTL simulation debugging

Scripting: TCL

Verification tools

Tools

Verilog simulators

Waveform viewers

EDA tools

Job description

Job Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Be part of the Cadence DDR PHY IP Front End Design team responsible for

• Develop firmware for DDR5 PHY using microcontrollers
• Developing firmware in C typically involving bare-metal programming and developing low-level APIs on Microcontrollers.
• Responsible for collaborating with hardware designers and memory subsystem architects to derive training algorithms and implement them.
• Responsible for collaborating with the verification team to deduce firmware-hardware co-verification plan.
• Develop and Debug firmware in RTL based hardware simulations (C +Verilog simulations)
• Develop and Debug on Silicon bring-up boards.

Required Skills:

• Good Knowledge of DDR5 JEDEC spec, knowledge of different DIMM configurations and specifications.
• Relevant experience in developing bare-metal firmware for High-speed SerDes or Memory interface Physical Layer blocks.
• Good Knowledge of C programming language for embedded software development and use of relevant IDE.
• Comfortable debugging RTL simulations involving firmware and microcontroller subsystem.
• Good knowledge of Shell/Perl/Python/TCL scripting
• Good experience on Verification EDA Tools like simulators and waveform viewers

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