Engineer II – IP Verification

Microchip Technology Inc.; Hyderabad; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

Microchip Technology Inc. in Hyderabad, India is seeking a hands-on IP/SoC verification engineer to join the IP Engineering group. You will develop and verify features in high‑speed serial interfaces, build robust test benches, and own verification tasks end‑to‑end.

The role emphasizes collaboration with cross‑functional teams, analysis of coverage metrics, and continuous improvement of verification methodologies; 3+ years in digital IP/SoC verification required.

Qualifications

• Proficiency in building verification environments, writing test benches, test cases and coverage points, etc.
• Proficiency in developing SV/UVM based test benches
• Experience of SystemVerilog, UVM/OVM methodologies
• Expert user of Siemens (Mentor) verification tools
• Working experience on scripting tools used for verification (tcl, perl, etc.)
• Understand Standard Specifications/the functional specifications/feature enhancements for the product and create micro‑architecture and detailed design for some of the components of the Test Environment for the IP cores in protocol areas such as AMBA (AMBA2, AXI)/ SD/eMMC/DDR/PCIe/Ethernet/MIPI/DSPs – FFT, FIR and Avionics – 1553
• Knowledge of MATLAB and C language programming skills is an added advantage

Responsibilities

• Verification ownership of one or more features in the high‑speed serial interfaces/protocols, experience on AMBA protocols, DSP, Video IP cores
• Developing a robust test bench, optimized for the specific feature/DUT
• Explore innovative verification methodologies to continuously push the quality and efficiency of test benches and process improvements
• Individual contributor in the Verification Tasks – Developing test benches, coding of test cases, debug, verification coverage improvement, etc.
• The candidate should be able to analyze the coverage metrics and improve them with definition of additional test cases
• The candidate will work in a project and team‑oriented environment and must be able to collaborate with other teams
• Willing to take ownership of the complete verification cycle
• Strong debugging and analytical skills and independent problem‑solving ability

Skills

Verification environments

Test benches

SystemVerilog

UVM/OVM

Mentor tools

Scripting (tcl, perl)

AMBA protocols

MATLAB

Education

BSEE/MSEE

Tools

Mentor Graphics verification tools

Job description

Job Description

The successful candidate will be a member of the IP Engineering group in Microchip Hyderabad, India and reports to the IP Engineering Manager. This hands‑on technical contributor role will allow the right candidate to develop engineering skills and participate in varied, interesting, and challenging development projects. The successful candidate works to achieve operational targets with major impact on departmental results.

Responsibilities

• Verification ownership of one or more features in the high‑speed serial interfaces/protocols, experience on AMBA protocols, DSP, Video IP cores
• Developing a robust test bench, optimized for the specific feature/DUT
• Explore innovative verification methodologies to continuously push the quality and efficiency of test benches and process improvements
• Individual contributor in the Verification Tasks – Developing test benches, coding of test cases, debug, verification coverage improvement, etc.
• The candidate should be able to analyze the coverage metrics and improve them with definition of additional test cases
• The candidate will work in a project and team‑oriented environment and must be able to collaborate with other teams
• Willing to take ownership of the complete verification cycle
• Strong debugging and analytical skills and independent problem‑solving ability

Qualifications

• BSEE/MSEE under Electronics or Electronics/Telecommunications Engineering department
• 3+ years relevant digital IP/SoC verification experience

Required Skills

• Proficiency in building verification environments, writing test benches, test cases and coverage points, etc.
• Proficiency in developing SV/UVM based test benches
• Experience of SystemVerilog, UVM/OVM methodologies
• Expert user of Siemens (Mentor) verification tools
• Working experience on scripting tools used for verification (tcl, perl, etc.)
• Understand Standard Specifications/the functional specifications/feature enhancements for the product and create micro‑architecture and detailed design for some of the components of the Test Environment for the IP cores in protocol areas such as AMBA (AMBA2, AXI)/ SD/eMMC/DDR/PCIe/Ethernet/MIPI/DSPs – FFT, FIR and Avionics – 1553
• Knowledge of MATLAB and C language programming skills is an added advantage

Travel

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