Engineer

Hire Today; India; On-site; INR 900,000 - 1,300,000; Full time

Job summary

Hire Today in India is seeking a Senior Physical Design Engineer to design and verify high-performance memory layouts for Arm memory IP, using Calibre and industry-standard tools.

You will implement full-custom layouts, run DRC/LVS/DFM checks, optimize for power and area, and collaborate with circuit and layout teams to resolve LVS/DRC issues.

Qualifications

• Bachelor's or Master's degree in a relevant engineering field.
• Experience with full-custom memory layouts and physical design.

Responsibilities

• Implement full-custom layouts for high-performance memory arrays.
• Perform DRC LVS and DFM verification using Calibre.
• Design and verify complex memory cells and blocks.
• Optimize layouts for power, performance and area.
• Debug LVS/DRC issues and support floor/metal planning.
• Collaborate with circuit design and layout teams.

Skills

Physical Design

Memory Layout

Custom Layout

Physical IP

Memory Circuits

Calibre

DRC

LVS

DFM

Electro-Migration

IR Drop

Metal Planning

Power Optimization

Performance Optimization

Area Optimization

TCL

Perl

Shell

SKILL

Scheme

Education

Bachelor's Degree

Master's Degree

Tools

Calibre

TCL

Perl

Shell

SKILL

Scheme

Job description

Design and verify high-performance custom memory layouts for Arm Physical IP Memory products using advanced semiconductor manufacturing processes and industry-standard physical verification tools.

Responsibilities

• Implement full-custom layouts for high-performance memory arrays and blocks
• Interpret and apply advanced physical design rules
• Design and verify complex memory cells
• Perform DRC LVS and DFM verification using Calibre
• Perform electro-migration and IR checks
• Optimize layouts for power performance and area
• Interpret complex hierarchical schematics
• Debug and resolve LVS and DRC issues
• Support floor planning and metal planning
• Collaborate with circuit design and layout teams

Skills required

• Physical Design
• Memory Layout
• Custom Layout
• Physical IP
• Memory Circuits
• Calibre
• DRC
• LVS
• DFM
• Electro-Migration
• IR Drop
• Metal Planning
• Power Optimization
• Performance Optimization
• Area Optimization
• TCL
• Perl
• Shell
• SKILL
• Scheme

Minimum Qualifications

• Bachelor's Degree
• Master's Degree

Preferred Qualifications

• Bachelor's Degree in Electrical Engineering
• Bachelor's Degree in Electronics Engineering
• Master's Degree in Electrical Engineering
• Master's Degree in Electronics Engineering