DFT Expert (15+ years)

Mulya Technologies; Bengaluru; On-site; INR 3,500,000 - 7,000,000; Full time

Job summary

Mulya Technologies is seeking an experienced DFT Lead to define test strategies for partition and full-chip levels, while directing a team of DFT engineers. You will drive boundary scan, ATPG, and MBIST efforts, ensuring coverage and smooth silicon bring-up with ATE.

Applicants should have extensive DFT experience, familiarity with Siemens, Cadence, and Synopsys toolchains, and strong scripting ability. Bangalore-based role with a chance to lead critical projects.

Qualifications

• Strong expertise in DFT, boundary scan, and MBIST.
• Experience with ATPG and test pattern validation.
• Ability to lead a team of DFT engineers (3-12 years).
• Familiarity with industry-standard flows and scripting.
• SSN familiarity is a plus.

Responsibilities

• Define test plan and strategy for partition and full chip levels.
• Lead DFT team to deliver on time and ensure quality.
• Support silicon bring-up on ATE and resolve issues.
• Ensure coverage targets are met and detect holes early.
• Collaborate with tool teams (Siemens/Cadence/Synopsys) and optimize flows.

Skills

Test plan & strategy

Partition level testing

Boundary scan (BSCAN)

Scan chain insertion

ATPG

MBIST simulations

Pattern verification (GLS)

Coverage analysis

Silicon bring-up on ATE

Scripting (CAD tooling)

Team leadership

DFT tools (Siemens/Cadence/Synopsys)

SSN familiarity

DFT seniority

Tools

Siemens

Cadence

Synopsys

Job description

Among. The top 4 IT companies, in India ranked by market capitalization and revenue

Reference JD:

• Ability to define Test plan and Test strategy at partition level and full chip level
• Experience in Scan chain insertion, chain balancing
• Experience in Boundary SCAN (BSCAN)
• Test pattern generation – stuck at and transition faults (ATPG)
• Validation of Test pattens by doing pattern simulations including GLS
• Coverage analysis, ability to detect coverage holes at early stage and ensure coverage targets are met
• Insertion of MBIST and carrying out MBIST simulations
• Ability to provide support during Silicon bring up on ATE
• Good verbal and written communication skills
• Should be able to manage a team of DFT engineers in the experience range of 3-12 years to ensure their deliveries meet requirements
• Must be familiar with industry standard tools and flows (Siemens/Cadence/Synopsys). Good handle on scripting.
• Experience with SSN would be added advantage
• Ideally a 15+ years experienced DFT expert who has performed the above duties for one or two projects in the recent past