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Talent Zone Consultancy in Bangalore is hiring a Design Verification Engineer with 4+ years of hands-on experience in semiconductor or IT software verification. You will develop and maintain UVM-based verification environments, create SystemVerilog testbenches and SVA assertions, and collaborate with design teams to validate RTL blocks.
The role requires strong knowledge of verification methodologies, debugging of simulation failures, and execution of constrained-random test scenarios.
Hiring: Design Verification Engineer
Talent Zone Consultancy is hiring Design Verification Engineers for an exciting opportunity in Bangalore.
Location: Bangalore
Experience: 4+ Years
Key Skills: SystemVerilog, UVM, RTL, SVA
Job Responsibilities
Talent Zone Consultancy | Connecting Talent with Opportunity
Jobs
Experience 4 - 8 Years
Salary Not Disclosed
Industry IT Software - QA / Testing / Documentation
Qualification
Key Skills Verification Engineer Design Verification