Design Verification Engineer

NXP Semiconductors; Pune District; On-site; INR 800,000 - 1,200,000; Full time

Job summary

A leading semiconductor company is seeking a Design Verification Engineer in Pune, India. You will develop verification environments to ensure the quality of complex designs. Required qualifications include 2+ years of verification experience, strong proficiency in SystemVerilog and UVM, and familiarity with industry-standard simulation tools. This position offers an opportunity to work in a collaborative team environment focused on cutting-edge technology.

Qualifications

• 2+ years of experience in digital IC design verification.
• Strong proficiency in SystemVerilog and UVM.
• Experience with industry-standard simulation tools.

Responsibilities

• Develop and implement verification environments and test benches.
• Create and execute detailed verification plans.
• Analyze simulation results and resolve issues.
• Document verification strategies and test plans.

Skills

SystemVerilog

UVM

Problem-solving skills

Attention to detail

Communication skills

Education

Bachelor's or Master's degree in Electrical Engineering or related field

Tools

Questa

VCS

Xcelium

Python

Perl

Tcl

Job description

Job Summary

As a Design Verification Engineer at NXP Semiconductors, you will play a crucial role in ensuring the functional correctness and quality of our cutting‑edge semiconductor designs. You will be responsible for developing and executing comprehensive verification plans to validate complex digital circuits, contributing to the delivery of robust and reliable products.

Job Responsibilities

• Develop and implement efficient and comprehensive verification environments and test benches using industry‑standard methodologies (e.g., UVM, SystemVerilog).
• Create detailed verification plans based on design specifications, identifying key functionalities and potential corner cases.
• Develop, execute, and debug test cases to thoroughly verify the design against its specifications.
• Analyze simulation results, identify discrepancies, and work closely with design engineers to resolve issues.
• Develop and maintain verification collateral, including assertions, functional coverage models, and verification scripts.
• Participate in verification reviews, contributing to the improvement of verification methodologies and processes.
• Collaborate with design, architecture, and software teams throughout the product development lifecycle.
• Contribute to the continuous improvement of verification flows and tools.
• Document verification strategies, test plans, and results effectively.

Job Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
• Proven experience (typically 2+ years) in digital IC design verification.
• Strong proficiency in SystemVerilog and UVM (Universal Verification Methodology).
• Experience with industry‑standard simulation tools (e.g., Questa, VCS, Xcelium).
• Solid understanding of digital design principles and architectures.
• Experience with scripting languages such as Python, Perl, or Tcl.
• Familiarity with functional coverage driven verification and assertion‑based verification.
• Excellent problem‑solving skills and attention to detail.
• Strong communication and interpersonal skills, with the ability to work effectively in a team environment.
• Fluency in English, both written and spoken.