Design Engineer

SmartSoC Solutions Pvt Ltd; Bengaluru; On-site; INR 1,500,000 - 1,900,000; Full time

Job summary

SmartSoC Solutions Pvt Ltd in Bengaluru is seeking an experienced analog/mixed-signal design engineer with 4+ years in the field. The role focuses on designing analog blocks for power management, clock management, and signal processing, with a strong emphasis on CMOS/FinFET technologies and analog/mixed-mode simulations.

Proficiency in scripting and modeling is advantageous. Candidates should demonstrate solid communication skills, layout insight, and experience working in a multi-site

Qualifications

• 4+ years of experience in Analog and mixed signal design.
• Hands-on experience in designing analog blocks for power management, clock management, and signal processing.
• Solid understanding of CMOS and FinFET process technologies (28nm, 16nm and smaller).
• Hands-on experience in analog and mixed-mode simulations; statistical simulations as well.
• Scripting (Perl, TCL) and modeling (Matlab, VerilogA) knowledge is an advantage.
• Good insight into layouts; silicon debug/characterization experience is an advantage.
• Strong documentation, communication and presentation skills; experience in a multi-site environment.

Skills

Analog and mixed-signal design

Power management

Clock management

Signal processing

CMOS/FinFET technologies

Analog/block simulation

Mixed-mode/simulations

Scripting (Perl, TCL)

Modeling (Matlab, VerilogA)

Layout awareness

Silicon debug/characterization

Documentation & communication

Multi-site collaboration

Education

B.E./B.Tech/M.E./M.Tech in ECE / VLSI / Electrical / Electronics Engineering

Tools

VerilogA

Matlab

Perl

TCL

Job description

• 4+ years of experience in Analog and mixed signal design
• Should have hands-on experience in designing analog blocks for any of the following domains:
• Power management (voltage and current references, voltage detectors, linear and/or switching regulators)
• Clock management (oscillators, PLL, DLL)
• Signal processing (ADC, DAC)
• Should have solid understanding of CMOS and FinFET process technologies and associated issues in deep sub-micron technologies i.e. 28nm, 16nm and smaller.
• Should have hands-on experience in simulation of analog blocks, mixed-mode simulations, statistical simulations etc.
• Knowledge in scripting (PERL, TCL, etc.) and modelling (Matlab, VerilogA, etc.) tools will be an advantage
• Should have good insight into layouts
• Silicon debug/characterization experience is an advantage
• Should possess good documentation, communication and presentation skills
• Experience of working in a multi-site environment

Qualification:

B.E./B.Tech/M.E./M.Tech in ECE / VLSI / Electrical / Electronics Engineering