Lead Analog Mixed Signal Design Engineer

Ciliconchip Circuit; Bengaluru; Vor Ort; INR 1.200.000 - 1.800.000; Vollzeit

Zusammenfassung

A leading semiconductor company in Bengaluru is looking for an experienced engineer to lead a small team of 5 to 8 engineers. The role involves designing and verifying complex analog sub-blocks of PCIe, UCIe, and DDR. The ideal candidate should have over 5 years of experience in analog/mixed signal design, strong expertise in transistor level circuit design, and excellent communication skills. The position offers an opportunity to work collaboratively with a team and engage directly with customers.

Qualifikationen

• 5 to 8+ years of experience in practical analog/mixed signal design for analog IPs.
• Relevant experience with PLL/SERDES, high-speed TX, compensation techniques.
• Experience leading a design team is highly preferred.

Aufgaben

• Train & lead a small team of 5 to 8 engineers.
• Design and verify complex analog sub-blocks of PCIe, UCIe & DDR.
• Work with customers to understand sub-block requirements and translate them into design.

Kenntnisse

Expert at transistor level circuit design

Expert in noise analysis

Excellent communication skills

Ausbildung

B.S. in Electrical Engineering (M.S. preferred)

Tools

EDA tools from Cadence

Simulations from Siemens

Tools from Synopsys

Jobbeschreibung

• To train & lead, small team of 5 to 8 engineers.
• Design and verification of complex analog sub-blocks of PCIe, UCIe & DDR.
• Work with customers to understand sub-block requirement, performance specification & translate that into design.
• Work collaboratively with a team of engineers to execute design according to technical specification and schedule in an efficient manner.
• Perform detailed circuit analysis, design, simulation, layout, verification of mixed-mode circuits
• Work with test engineers to facilitate development of test hardware, test plans, and oversee chip bring-up and characterization efforts and results.

Requirements:

• B.S. in Electrical Engineering (M.S. preferred)
• 5 to 8+ years of experience in practical analog/mixed signal design for analog IPs
• Expert at transistor level circuit design, simulation, verification using modern EDA tools from Cadence, Siemens, Synopsys, etc.
• Relevant experience with PLL/SERDES, high-speed TX, general feedback, and compensation techniques.
• Expert in noise analysis, transistor/capacitor matching and sources of errors in analog integrated circuits.
• Experience leading a design team is highly preferred.
• Excellent communication skills are required