Design and Verification Engineer | Semiconductor Design Engineer

Acesoft Labs; Hyderabad; On-site; INR 900,000 - 1,300,000; Full time

Job summary

Acesoft Labs in Hyderabad seeks a semiconductor design verification engineer with 3-5 years of experience to contribute to chip layout verification, timing checks, and documentation of device specifications.

You will guide verification direction, simulate and debug full chip designs, develop test benches and vectors, and work with international colleagues to advance verification flows for DRAM and emerging memories. TSMC certification is a plus.

Responsibilities

• Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes.
• Provide verification support to design projects by simulating, analyzing and debugging pre-silicon full chip designs.
• Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features.
• Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products.
• Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design.
• Experience with Gate Level Simulations and timing debugs.
• Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements.

Job description

Role & responsibilities

Description:

Performs semiconductor design engineering assignments including engineering and designing chip layout circuits, circuit checking, documenting specifications, modifying and evaluating semiconductor devices and components. Reviews product requirements and logic diagrams for device definition. Typically responsible for projects, or portions of projects, to design, fabricate, modify, and evaluate semiconductor devices and components. 3-5 years of experience

• Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes.
• Provide verification support to design projects by simulating, analyzing and debugging pre-silicon full chip designs.
• Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features.
• Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products.
• Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design.
• Experience with Gate Level Simulations and timing debugs.
• Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements.

Additional Details

• TSMC Certification:- Added Advantage