Semiconductor Design Engineer Sr

Acesoft Labs; Hyderabad; On-site; INR 2,500,000 - 4,500,000; Full time

Job summary

Acesoft Labs in Hyderabad invites an experienced Memory Circuit Design Verification Engineer with 7–10 years of experience to lead verification of memory-centric designs. You will drive the team, define verification strategy, and ensure timely, functionally correct delivery of complex full-chip designs using memory technologies.

The role emphasizes collaboration with global teams, development of test benches, stimulus, and coverage-driven verification for DRAM/SRAM and emerging memories,

Qualifications

• Experience in SystemVerilog and PLI coding.
• Experience in UVM test benches.
• Experience with DRAM/SRAM or memory architectures.
• Experience in AMS verification and co-simulation.

Responsibilities

• Guide and set the direction for verification efforts within areas of expertise.
• Provide verification support by simulating, analyzing, and debugging pre-silicon full chip designs.
• Develop test cases/stimulus to increase functional coverage for DRAM and memory architectures.
• Develop verification methodology and environments for sophisticated products.
• Collaborate with international colleagues on verification flows.
• Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage.

Skills

SystemVerilog

PLI coding

UVM Test Bench

Memory design basics

Education

Bachelor's or Master's in Electronics Engineering

Tools

SPICE

Verilog simulations

Job description

Design verification: Experience Range: 7-10 years

As a Memory Circuit Design Verification Engineer you will work in a highly innovative, motivated, Upbeat, and dynamic design team capable of verifying complete products using innovative memory technologies. You will need to have the ability to drive the team and the overall verification effort to ensure the timely delivery of a functionally accurate design.

Unique Opportunities

Complete ownership of verification and end to end analysis of sophisticated full chip gate level custom designs with advanced low power and power management for graphics products

Collaborate closely with design and verification team members spread across the globe, many of whom have decades of experience in memory design.

Work on multi-functional tasks that can widen your skills.

Responsibilities:

• Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes.


• Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon full chip designs.


• Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features.


• Participate in developing verification methodology and verification environments for sophisticated products.


• Co-work with international colleagues on developing new verification flows to take on the challenges in design.


• Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements.

Core Requirements

• Good communication skills and ability to work well in a team


• Guide new team members and energetic engineers in the team


• Analytical capability for complex CMOS and/or gate level circuit designs


• Proficient with either SPICE and/or Verilog simulations

Qualifications & Skills

• Experience in SystemVerilog, PLI coding


• Experience in UVM Test Bench


• Experience in DRAM, SRAM or other memory related fields


• Experience in AMS verification and co-sim

Education

• Bachelors or Post Graduate Degree in Electronics Engineering or related engineering field required