Semiconductor Design Engineer

Acesoft Labs; Hyderabad; On-site; INR 1,800,000 - 2,400,000; Full time

Job summary

Acesoft Labs in Hyderabad, India is seeking a Senior Memory Circuit Design Verification Engineer to drive the verification of DRAM memory technologies. You will lead the team, develop test benches, and coordinate pre-silicon full-chip verification efforts to ensure functionally correct designs.

The role requires hands‑on experience with fastspice verification (Primesim, Finesim, Spectre), UVM knowledge, DFT concepts, and strong circuit/schematic analysis to deliver robust DRAM architectures and

Qualifications

• Experience with circuit simulation and timing concepts.
• DFT concepts and test modes knowledge.
• Knowledge of UVM verification environments and methodologies.
• Exposure to IEEE 1500/JTAG is a plus.

Responsibilities

• Responsibilities for fastspice(Primesim/Finesim/spectre) based verification.
• Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes.
• Circuit understanding
• Block level circuit simulation , Analysis capability
• Analysis of the test modes , Basic DFT understanding
• Provide verification support to design projects by simulating, analyzing and debugging pre-silicon full chip designs.
• Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features.
• Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products.
• Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design.
• Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements.

Skills

Circuit simulation

Timing analysis

DFT knowledge

Schematic analysis

UVM concepts

IEEE1500/JTAG

Test bench

Job description

Job Description Summary

As a Senior Memory Circuit Design Verification Engineer, you will work in a highly innovative, motivated, young, and dynamic design team capable of verifying complete products using state of the art DRAM memory technologies. You will need to have the ability to drive the team and the overall verification effort to ensure the timely delivery of a functionally correct design.

Job Description

Responsibilities

• Responsibilities for fastspice(Primesim/Finesim/spectre) based verification.
• Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes.
• Circuit understanding
• Block level circuit simulation , Analysis capability
• Analysis of the test modes , Basic DFT understanding
• Provide verification support to design projects by simulating, analyzing and debugging pre-silicon full chip designs.
• Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features.
• Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products.
• Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design.
• Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements.

Good to Have Skills/Experience

Common

• Circuit simulation experience
• Analysis of Circuits , Timing concepts
• DFT knowledge
• schematic analysis

Digital Verification

• High level understanding of UVM
• DFT Features Both custom DFT and standard like scan chains
• Exposure to IEEE1500/JTAG

FastSpice Verification

• Critical timing, data path timing analysis
• Simulation based reliability analysis (BTI, HC)