ASIC Engineer, Formal Verification

Meta Careers; Bengaluru; On-site; INR 1,800,000 - 2,500,000; Full time

Job summary

Meta is seeking an ASIC Formal Verification Engineer for the Infrastructure organization in Bangalore, India. You will develop formal test plans and drive sign-off for complex blocks, partnering with software, hardware, ASIC design, emulation and post-silicon teams to accelerate first-pass silicon success.

The role focuses on defining verification scopes, building scalable environments and evaluating EDA solutions to advance data center ASIC solutions.

Qualifications

• Bachelor's degree in Computer Science, Computer Engineering, a relevant technical field, or equivalent practical experience.

Responsibilities

• Propose, implement and promote the Formal Verification Methodology to be used across the group, both at the top level and at the block level.
• Work with Architecture and Design teams to come up with Formal Verification specification and implementation.
• Define Formal Verification scope, create Formal environment and close coverage with targeted Formal Verification Techniques at IP, Subsystem and SoC level.
• Build reusable/scalable environments for Formal Verification and deploying tools.
• Evaluate and recommend EDA solutions for Formal Verification

Skills

Formal Verification

IP/SoC verification

Education

Bachelor's degree in CS/CE or equivalent

Tools

EDA tools

Job description

# ASIC Engineer, Formal VerificationBangalore, India Hardware+ 1 moreApply nowMeta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Formal Verification to build IP and System On Chip (SoC) for data center applications. As a Formal Verification Engineer, you will be part of a team working with experienced engineers across the industry, focused on developing innovative ASIC solutions for Facebook’s data center applications. You will be developing comprehensive formal testplans and be responsible for complete formal verification sign-off of single or multiple complex blocks. The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success.---## ASIC Engineer, Formal Verification Responsibilities* Propose, implement and promote the Formal Verification Methodology to be used across the group, both at the top level and at the block level* Work with Architecture and Design teams to come up with Formal Verification specification and implementation* Define Formal Verification scope, create Formal environment and close coverage with targeted Formal Verification Techniques at IP, Subsystem and SoC level* Build reusable/scalable environments for Formal Verification and deploying tools* Evaluate and recommend EDA solutions for Formal Verification## Minimum Qualifications* Bachelor's degree in Computer Science, Computer Engineering, a relevant technical field, or equivalent practical experience