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Mirafra in Hyderabad, India is seeking an experienced Layout Engineer for RF/Analog design to handle block- and chip-level layout tasks in a fast-paced team environment.
You will perform custom layout including floorplanning, placement, routing, verification, and database release for high-frequency RF circuits, while mentoring junior designers and coordinating with peers to meet milestones.
Hi,
Please find the below details
QCT RF/Analog design group is seeking an experienced Layout Engineer to fulfill both block level roles working in a large team environment. Responsibilities will vary depending on experience and expertise. The layout designer will be responsible for physical design of RF and analog circuits in a fast-paced environment. Detail custom layout including floorplan, placement, routing, verification, and release of final database for high frequency RF circuits. Provide accurate schedule and plan to meet project milestone deadlines, debug complex verification errors, mentor junior layout designers, able to lead a team to deliver high quality layout that meets design requirements, understanding of hierarchical planning and integration, chip design from top down and bottom up through Tapeout. The layout designer should have strong analog layout fundamentals and focused exposure to handling multi voltage domain circuit layouts, latchup and ESD aware layout development strategy.
Regards,
Riki Dutta Saha
PH: 8642026147
Email Id: rikidutta@mirafra.com