Staff Front-End Implementation Engineer – SoC Timing

Qualcomm; Cork; On-site; EUR 110,000 - 180,000; Full time

Benefits offered by this job

Stock and bonus

Leave (maternity/paternity)

Stock purchase plan

Pension matching

Education assistance

Relocation support

Insurance

Well-being subsidies

Bike scheme

Employee clubs

Job summary

QT Technologies Ireland Limited in Cork, Ireland is seeking a Front-End Implementation Engineer to help create top-level timing constraints, perform physical synthesis, formal verification and ECOs to bridge RTL and physical design.

You will join the Digital ASIC team working on Snapdragon SoCs at 4nm and below technology, collaborating across RTL, CAD flows and validation to ensure tight timing and low-power designs.

Qualifications

• Masters in Electronics or Computer Engineering plus a minimum 5 years of experience.
• Timing constraint development for large complex SoC devices.
• TCL script development and CAD design flows.

Responsibilities

• Create top-level timing constraints and drive timing closure.
• Perform physical synthesis and formal verification for complex SoCs.
• Implement functional ECOs bridging RTL and physical design.

Skills

Logical/Physical synthesis

DFT implementation

Timing closure in STA

Timing constraint capture in TCL

Formal verification

Verilog RTL design

UPF, Low power checks

TCL/PERL/Python scripting

Education

Bachelor's degree in Science, Engineering, or related field

Master's degree in Science, Engineering, or related field

PhD in Science, Engineering, or related field

Tools

Synopsys tools

Job description

QT Technologies Ireland Limited in Cork, Ireland is seeking a Front-End Implementation Engineer to help create top-level timing constraints, perform physical synthesis, formal verification and ECOs to bridge RTL and physical design.

You will join the Digital ASIC team working on Snapdragon SoCs at 4nm and below technology, collaborating across RTL, CAD flows and validation to ensure tight timing and low-power designs.