Senior Mixed-Signal IP Digital Design Engineer

MaC VC; Cork; Presencial; EUR 95 000 - 140 000; Tempo integral

Vantagens oferecidas por esta oferta de emprego

Salary and stock bonus

Maternity/Paternity Leave

Employee stock purchase scheme

Matching pension scheme

Education Assistance

Relocation and immigration support

Life, Medical, Travel Insurance

Subsidised wellness memberships

Bicycle purchase scheme

Resumo da oferta

QT Technologies Ireland Limited in Cork, Ireland, is seeking experienced digital design engineers for next-generation mixed-signal IPs. The role covers architecture, RTL coding, front-end implementation, and collaboration with DV and PD teams for verification and physical realization.

The team focuses on high-performance, low-power IPs for mobile, compute, automotive, and AI applications, with opportunities for impact across the IP design lifecycle. Strong communication is essential.

Qualificações

• Master's or PhD in a relevant field with multiple years of ASIC digital design experience.
• Strong background in micro-architecture, RTL design, and front-end implementation.
• Experience with DV/PD collaboration and industry tools listed above.

Responsabilidades

• Architecture, design, and implementation of digital sections of mixed-signal IPs.
• Apply DSP and optimization techniques to improve PPA of IPs.
• Run full ASIC design tool flows for validation and implementation.
• Collaborate with DV and PD teams for verification and physical design.
• Create design specifications and documentation, support silicon bring-up.

Conhecimentos

ASIC design

RTL design

Micro-architecture

Front-end tools

DSP knowledge

Python scripting

Formação académica

Master's degree in Electrical/Computer Engineering or related field

Bachelor's degree in Science/Engineering or related field

PhD in Science/Engineering or related field

Ferramentas

Design Compiler

Fusion Compiler

Modelsim

VCS

Spyglass

Primetime

Descrição da oferta de emprego

QT Technologies Ireland Limited in Cork, Ireland, is seeking experienced digital design engineers for next-generation mixed-signal IPs. The role covers architecture, RTL coding, front-end implementation, and collaboration with DV and PD teams for verification and physical realization.

The team focuses on high-performance, low-power IPs for mobile, compute, automotive, and AI applications, with opportunities for impact across the IP design lifecycle. Strong communication is essential.