Senior DDR IP Designer – Analog/Mixed-Signal

QUALCOMM, Inc.

Cork

On-site

EUR 95,000 - 150,000

Full time

3 days ago
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Benefits offered by this job

Salary and bonus
Relocation and immigration support
Life and medical insurance
Pension matching
Education assistance
Employee stock purchase
Bike purchase scheme
Well-being programs

Job summary

QT Technologies Ireland Limited is seeking talented analog/mixed-signal designer engineers to work on Rx/Tx IO blocks, DLL/PLL, and high-frequency circuits for next-generation DDR/Chip-to-Chip PHY. You'll join a growing team tackling architecture analysis in advanced nodes (2nm+), aiming for low-power, high-speed designs across Snapdragon SoC products.

The role involves full-custom design, SPICE validation, post-silicon support, and close collaboration with layout and physical design teams to

Qualifications

  • Bachelor's degree in Science or Engineering required.
  • 3+ years ASIC design/verification experience.
  • Master's or PhD preferred for advanced roles.

Responsibilities

  • Architect high-speed mixed-signal circuits for LPDDR5/6.
  • Design blocks: Rx/Tx, clocking, DLL/PLL, references and band-gap blocks.
  • Draw schematics and perform SPICE analysis for pre-silicon validation.
  • Support post-silicon bring-up and system enablement.
  • Collaborate with mask layout and physical design teams.
  • Address power delivery and signal integrity concerns.

Skills

Analog/mixed-signal design
SPICE simulation
Schematic capture
High-speed IO design
Signal integrity
GenAI scripting
Full-custom layout
Team collaboration

Education

Bachelor's degree in Science/Engineering
Master's or PhD in related field

Tools

Schematic capture tools

Job description

QT Technologies Ireland Limited is seeking talented analog/mixed-signal designer engineers to work on Rx/Tx IO blocks, DLL/PLL, and high-frequency circuits for next-generation DDR/Chip-to-Chip PHY. You'll join a growing team tackling architecture analysis in advanced nodes (2nm+), aiming for low-power, high-speed designs across Snapdragon SoC products.

The role involves full-custom design, SPICE validation, post-silicon support, and close collaboration with layout and physical design teams to

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