Senior Design Verification Engineer RF & SoC

AMD

Dublin

On-site

EUR 90,000 - 130,000

Full time

14 days+
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Job summary

AMD is seeking a Senior Design Verification Engineer to join its Analog and Digital-RF team in Ireland. You will develop and execute verification plans for complex semiconductor designs, and build advanced verification environments using UVM and SystemVerilog.

You will write and debug SystemVerilog/UVM testbenches, implement coverage-driven verification, and collaborate across design, architecture, and software teams to ensure robust validation and continuous process improvement.

Qualifications

  • Experience in semiconductor design verification.
  • Experience with SystemVerilog and UVM.
  • Experience with verification tools such as VCS, Questa, and Synopsys tools.
  • Strong problem-solving and attention to detail.
  • Excellent communication and collaboration in teams.

Responsibilities

  • Develop and execute verification plans for complex designs.
  • Design and implement UVM-based verification environments.
  • Write and debug SystemVerilog and UVM testbenches.
  • Develop coverage-driven verification strategies.
  • Collaborate with design teams to understand specs and improvements.
  • Analyze and debug failures with simulation and debugging tools.
  • Work with cross-functional teams to ensure integration and validation.
  • Drive continuous improvement of verification methodologies and AI initiatives.

Skills

SystemVerilog
UVM

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, or related field

Tools

VCS
Questa
Synopsys tools

Job description

AMD is seeking a Senior Design Verification Engineer to join its Analog and Digital-RF team in Ireland. You will develop and execute verification plans for complex semiconductor designs, and build advanced verification environments using UVM and SystemVerilog.

You will write and debug SystemVerilog/UVM testbenches, implement coverage-driven verification, and collaborate across design, architecture, and software teams to ensure robust validation and continuous process improvement.

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