Senior Hardware Verification Engineer - AI/SoC DSP

QUALCOMM, Inc.; Cork; On-site; EUR 90,000 - 130,000; Full time

Benefits offered by this job

Salary & stock

Performance bonus

Relocation support

Insurance benefits

Education assistance

Pension scheme

Well-being programs

Job summary

QUALCOMM, Inc. is seeking a Senior Hardware Verification Engineer in Ireland to lead verification of complex processor and AI accelerator designs. You will develop robust testbenches, coverage plans, and verification strategies while mentoring junior engineers and collaborating with architects and software teams.

The role emphasizes constrained-random and formal verification across CPU/GPU/DSP blocks, with opportunities to improve methodologies and tooling in a fast-paced environment.

Qualifications

• Bachelor’s degree in a related field and 4+ years in ASIC/SoC verification or equivalent.
• Strong background in SystemVerilog/UVM and modern verification methodologies.
• Experience with CPU/GPU/DSP or AI accelerator verification preferred.

Responsibilities

• Drive verification of complex processor, DSP, AI accelerator, and system designs.
• Develop verification plans, testbenches, and coverage strategies.
• Execute constrained-random, coverage-driven, assertion-based, and formal verification.
• Collaborate with design/architecture to mitigate verification risks.
• Debug RTL and system-level issues via simulation, emulation, and formal analysis.
• Create reusable verification infrastructure and verification IP.

Skills

SystemVerilog

UVM

Constrained-random

Python

C/C++

Debugging

Education

Bachelor's degree in CE/CS/EE

Master's degree

PhD (preferred)

Tools

Emulation

FPGA prototyping

Formal verification tools

Job description

QUALCOMM, Inc. is seeking a Senior Hardware Verification Engineer in Ireland to lead verification of complex processor and AI accelerator designs. You will develop robust testbenches, coverage plans, and verification strategies while mentoring junior engineers and collaborating with architects and software teams.

The role emphasizes constrained-random and formal verification across CPU/GPU/DSP blocks, with opportunities to improve methodologies and tooling in a fast-paced environment.