Lead Design Verification Engineer - Mixed-Signal Power

1020 ADBV Ireland

Dublin

Hybrid

EUR 150,000 - 190,000

Full time

14 days+
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Benefits offered by this job

Relocation assistance
Visa sponsorship

Job summary

Analog Devices, Inc. in Ireland is seeking a Principal Engineer, Design Verification Engineering to lead verification of mixed-signal power converter controllers. You will architect test plans, develop SystemVerilog/UVM testbenches, and drive coverage closure across silicon bring-up with cross-functional teams.

You will mentor engineers, define sign-off criteria, and contribute to scalable CI/regression. Travel up to 10% is expected as part of collaboration with global teams.

Qualifications

  • 12+ years of IC design verification experience with a BSEE/BSCS.
  • Proven leadership delivering verification from concept to tape-out.
  • Expert in SystemVerilog/UVM, constrained-random, and advanced debug.
  • Ability to mentor engineers and drive cross-functional reviews.
  • Travel up to 10% globally.

Responsibilities

  • Provide technical leadership for design verification of mixed-signal power converter controllers.
  • Own end-to-end verification plans, test strategy, and sign-off criteria.
  • Develop and review SystemVerilog/UVM testbenches and coverage.
  • Collaborate with analog, digital, and system architects to translate requirements.
  • Lead verification reviews, risk assessments, and cross-team alignment.

Skills

SystemVerilog/UVM
constrained-random
testbenches
debug/triage
mentoring
travel

Education

BSEE/BSCS (or equivalent)
Advanced degree (a plus)

Tools

Xcelium/VCS/Questa
LINT / CDC / RDC
Python / Tcl / Shell
Verilog-AMS / AMS models

Job description

Analog Devices, Inc. in Ireland is seeking a Principal Engineer, Design Verification Engineering to lead verification of mixed-signal power converter controllers. You will architect test plans, develop SystemVerilog/UVM testbenches, and drive coverage closure across silicon bring-up with cross-functional teams.

You will mentor engineers, define sign-off criteria, and contribute to scalable CI/regression. Travel up to 10% is expected as part of collaboration with global teams.

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