Senior Hardware Verification Architect – AI/DSP SoC

Qualcomm; Cork; On-site; EUR 120,000 - 170,000; Full time

Benefits offered by this job

Salary and bonus package

Maternity/Paternity Leave

Employee stock purchase scheme

Pension matching scheme

Education assistance

Relocation support

Life and health insurance

Wellbeing memberships

Bicycle purchase scheme

Employee clubs

Job summary

QT Technologies Ireland Limited is seeking a Senior Hardware Verification Engineer to lead verification across CPU/DSP/AI accelerator designs. You will shape verification plans, develop testbenches, and guide a team of engineers to deliver high-quality silicon.

The role requires deep SystemVerilog/UVM expertise, extensive verification experience, and strong collaboration with architects and software teams to ensure robust, scalable verification methodologies.

Qualifications

• Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering or related field.
• 10+ years of hardware design verification experience.
• Strong SystemVerilog, UVM and modern verification methodologies.

Responsibilities

• Lead verification of complex processor, DSP, AI accelerator, and system-level designs.
• Develop verification plans, testbenches, and coverage strategies.
• Drive verification using constrained-random, coverage-driven, assertion-based and formal methods.
• Collaborate with design teams to review specs and mitigate verification risks.
• Debug RTL and system-level issues via simulation, emulation and formal analysis.
• Build reusable verification infrastructure and verification IP.

Skills

SystemVerilog

UVM

Constrained-random

Coverage-driven

Assertion-based

Formal verification

Debugging

Education

Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering

Master's or PhD preferred

Tools

Simulation

Emulation

FPGA prototyping

Job description

QT Technologies Ireland Limited is seeking a Senior Hardware Verification Engineer to lead verification across CPU/DSP/AI accelerator designs. You will shape verification plans, develop testbenches, and guide a team of engineers to deliver high-quality silicon.

The role requires deep SystemVerilog/UVM expertise, extensive verification experience, and strong collaboration with architects and software teams to ensure robust, scalable verification methodologies.