Senior ASIC Digital Design Lead for Automotive IP (ASIL D)

Synopsys Inc; Dublin; Sur place; EUR 75 000 - 90 000; Plein temps

Avantages offerts par ce poste

Comprehensive health benefits

Wellness programs

Financial benefits

Résumé du poste

Synopsys Inc in Dublin seeks an experienced RTL Developer specializing in automotive digital IP development. You will be responsible for designing RTL for controllers meeting ISO 26262 standards, leading teams in RTL coding, optimization, and ensuring thorough verification before tapeout.

The ideal candidate has extensive experience with PCIe, DDR, and in-depth knowledge of Verilog/System Verilog. We offer competitive benefits and rewards, and details regarding salary will be discussed during the hiring process.

Qualifications

• 8+ years of experience in Automotive SoCs or Digital IPs.
• Proven IP-level experience with PCIe, DDR, or UCIe protocols.
• Ability to mentor and lead engineering teams.

Responsabilités

• Design and own RTL for automotive digital IP blocks.
• Lead RTL coding, lint and CDC analysis, synthesis optimization.
• Work with verification teams to ensure controllers are validated.

Connaissances

ISO 26262 compliance

RTL design

Verilog/System Verilog

PCIe protocols

DFMEA/FMEDA

Formation

Bachelor's degree in Engineering

Master's degree in Engineering

Outils

ASIC design tools

Description du poste

Synopsys Inc in Dublin seeks an experienced RTL Developer specializing in automotive digital IP development. You will be responsible for designing RTL for controllers meeting ISO 26262 standards, leading teams in RTL coding, optimization, and ensuring thorough verification before tapeout.

The ideal candidate has extensive experience with PCIe, DDR, and in-depth knowledge of Verilog/System Verilog. We offer competitive benefits and rewards, and details regarding salary will be discussed during the hiring process.