Senior Analog Design Engineer

eTeam; Cork; On-site; EUR 70,000 - 90,000; Full time

Job summary

eTeam in Ireland is seeking a Senior Engineer with 4–8 years of experience to own the debug and verification of complex analogue designs. The role focuses on full Rx/Tx chain verification simulations between RF and IF ports, reporting compliance to specifications, and validating device register controls for testing.

The successful candidate will collaborate with design and technical leads to deliver fully verified blocks in a tightly constrained environment, ensuring high-quality solutions and

Qualifications

• 4–8 years of experience in analogue/RF verification.
• Experience in Rx/Tx chain verification between RF and IF ports.
• Ability to interpret specifications and report compliance.
• Experience coordinating a layout engineer and reviewing layouts.

Responsibilities

• Review block specifications and ensure designs meet requirements.
• Schematic design, simulation, and reporting compliance to specifications.
• Oversee a layout engineer to complete the layout.
• Post-layout parasitic simulation and necessary adjustments.
• Liaise with the technical lead to integrate designs.
• Present designs for block-level reviews.
• Complete top-level verification simulations and report compliance to specs.
• Validate device register control settings for testing.

Skills

RF verification

Analog design

Schematic design

Verification simulations

Reporting compliance

Job description

We are seeking a Senior Engineer with 4–8 years of experience to take ownership of the debug and verification of complex analogue designs. The role will focus on performing full Rx/Tx chain verification simulations between RF and IF ports, reporting compliance against specifications, and validating device register controls for testing.

The successful candidate will work closely with design and technical leads to deliver fully verified blocks and ensure high-quality solutions within a complex, tightly constrained environment.

The tasks will include:

• Review of block specifications.
• Schematic design, simulation and reporting compliance to specifications.
• Overseeing a layout engineer to complete the layout.
• Post-layout parasitic simulation and necessary adjustments.
• Liaising with the relevant technical lead to integrate the designs.
• Presentation of design for block-level reviews.
• Completing top level verification simulations:
• Reporting compliance to spec.
• Validating device register control settings for test.