Mixed-Signal Verification Engineer – SoC Co-Simulation

onsemi

Cork

On-site

EUR 70,000 - 100,000

Full time

6 days ago
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Job summary

onsemi is seeking a Mixed Signal Verification Engineer to join its Core Analog IP Development Centre of Excellence in Cork, Ireland. You will verify mixed-signal IP and complex SoCs, coordinating with analog and digital teams to ensure verification closure across power, clock, monitoring and reset functions.

You will develop verification plans, reusable environments and RNM models, using SystemVerilog/UVM with co-simulation to balance accuracy and performance.

Qualifications

  • Bachelor's or Master's degree in electrical/electronic engineering or closely related discipline.
  • 4-8 years of relevant IC verification experience.
  • Proficiency with SystemVerilog, UVM and mixed-signal verification.
  • Experience with co-simulation of analog with RTL/digital logic.

Responsibilities

  • Develop verification plans for mixed-signal IP, SoCs and digital-on-top subsystems.
  • Build reusable SystemVerilog/UVM environments integrating analog models.
  • Verify analog/digital interactions and testbench coverage.
  • Develop directed and constrained-random tests for power, clock, sequencing and faults.
  • Implement assertions and scoreboards; drive coverage closure.
  • Execute regressions and document verification results and risks.

Skills

SystemVerilog
UVM
Verilog-AMS
RNM modelling
Python scripting
Linux environment
mixed-signal verification
co-simulation

Education

Bachelor's or Master's in Electrical/Electronic Engineering

Tools

Cadence
Synopsys
Siemens EDA

Job description

onsemi is seeking a Mixed Signal Verification Engineer to join its Core Analog IP Development Centre of Excellence in Cork, Ireland. You will verify mixed-signal IP and complex SoCs, coordinating with analog and digital teams to ensure verification closure across power, clock, monitoring and reset functions.

You will develop verification plans, reusable environments and RNM models, using SystemVerilog/UVM with co-simulation to balance accuracy and performance.

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