Verification Engineer - High-Speed AI/ML Networking

Oriole; England; On-site; GBP 70,000 - 110,000; Full time

Job summary

Oriole Networks seeks an experienced Verification Engineer to join our team, developing high-speed network interfaces for xPUs and our IP. You will deliver module and system level verification, architect testbenches, and drive coverage closure through iterative prototyping.

Candidates should have hands-on FPGA/ASIC verification at 100Gbps+, strong SystemVerilog, and experience with Questa or VCS. You will collaborate with RTL, hardware validation, and software teams to deliver production-grade

Qualifications

• Extensive hands-on FPGA/ASIC verification experience, 100Gbps+.
• Unit and system level verification experience for FPGA IP.
• Experience architecting verification environments and infra.
• Strong SystemVerilog with assertions and coverage knowledge.
• Scripting in TCL/Python for automation.
• Experience with Questa, VCS and formal tools.

Responsibilities

• Definition and execution of verification strategies and plans.
• Develop module and system level testbenches with stimulus, monitors, checkers, and scoreboards.
• Maintain functional coverage models and drive coverage closure.
• Support hardware validation, debugging complex issues with RTL and system teams.

Skills

SystemVerilog

Testbench development

Assertions

Coverage analysis

Scripting

Education

Bachelor/Master in electronics or physics

Tools

Questa

VCS

Questa Formal

JasperGold

Job description

Oriole Networks seeks an experienced Verification Engineer to join our team, developing high-speed network interfaces for xPUs and our IP. You will deliver module and system level verification, architect testbenches, and drive coverage closure through iterative prototyping.

Candidates should have hands-on FPGA/ASIC verification at 100Gbps+, strong SystemVerilog, and experience with Questa or VCS. You will collaborate with RTL, hardware validation, and software teams to deliver production-grade