Strategic TPM: FPGA & Emulation Platform Lead

Camwebdir; United Kingdom; Hybrid; GBP 80,000 - 110,000; Full time

Job summary

Arm in the United Kingdom is seeking a Technical Program Manager to lead FPGA and Emulation platform development across CSS/SoC projects, coordinating architecture, RTL, verification, software, FPGA and validation teams to ensure timely delivery ahead of silicon bring-up.

This technically engaged role emphasizes planning, risk management, and clear stakeholder communication in a fast-paced hardware environment, with a hybrid work pattern.

Qualifications

• Degree in Engineering, Computer Science or a related field, or equivalent experience.
• Experience managing complex technical projects in semiconductor or hardware development.
• Excellent communication skills with the ability to influence across engineering teams.

Responsibilities

• Project manage FPGA and Emulation platform developments from planning through delivery.
• Build and maintain project plans, schedules, turning points and dependencies.
• Manage project scope, requirements, risks and changes throughout the project lifecycle.
• Work with architecture, RTL, verification, software, FPGA and validation teams to keep projects on track.
• Lead project evaluations, track progress and provide clear status updates to engineering and leadership.
• Identify issues early and drive them through to resolution.
• Manage competing priorities while balancing technical, schedule and business needs.
• Support software development and first silicon bring-up by delivering high-quality FPGA and Emulation platforms.
• Capture lessons learned and help improve project management practices across the organisation.

Skills

Cross-functional delivery

Stakeholder communication

Project coordination

Education

Engineering or Computer Science degree

Job description

Arm in the United Kingdom is seeking a Technical Program Manager to lead FPGA and Emulation platform development across CSS/SoC projects, coordinating architecture, RTL, verification, software, FPGA and validation teams to ensure timely delivery ahead of silicon bring-up.

This technically engaged role emphasizes planning, risk management, and clear stakeholder communication in a fast-paced hardware environment, with a hybrid work pattern.