SoC Verification Engineer: UVM & Embedded C Testing

Infoplus Technologies UK Ltd; Long Ashton; On-site; GBP 60,000 - 100,000; Full time

Job summary

Infoplus Technologies UK Ltd. is seeking experienced SoC Design Verification (DV) Engineers to verify a next-generation multi-die SoC design.

You will perform subsystem and SoC functional verification using SystemVerilog/UVM, and develop processor-based C tests for embedded cores. The role requires debugging and analytical skills, understanding ARM-based SoC architecture, and adapting verification environments to evolving design requirements.

Qualifications

• Bachelor's or Master's degree in Electronics, Electrical Engineering, Computer Engineering, VLSI, or related discipline.
• System Verilog/UVM proficiency - ability to understand, modify, and debug existing verification environments.
• SoC/subsystem verification experience - practical experience with complex RTL designs and subsystem interactions.

Responsibilities

• Subsystem and SoC Functional Verification.
• System Verilog/UVM Testbench Reuse and Enhancement.
• Processor-Based C Test Development and Verification.
• Regression Execution, Debugging, and Coverage Closure.
• Verification Planning and Collaboration.

Skills

System Verilog

UVM

SoC Verification

C

Debugging

Functional Coverage

Gate level simulation

ARM processors

Python

Version control

Regression testing

Scripting

Education

Bachelor's or Master's in Electronics, EE, CE or related

System Verilog/UVM proficiency

SoC/subsystem verificationExperience

Tools

None

Job description

Infoplus Technologies UK Ltd. is seeking experienced SoC Design Verification (DV) Engineers to verify a next-generation multi-die SoC design.

You will perform subsystem and SoC functional verification using SystemVerilog/UVM, and develop processor-based C tests for embedded cores. The role requires debugging and analytical skills, understanding ARM-based SoC architecture, and adapting verification environments to evolving design requirements.