Senior RTL Verification Engineer - Hybrid & UVM Expert

AccelerComm Ltd; Southampton; Hybride; GBP 60 000 - 90 000; Plein temps

Avantages offerts par ce poste

EMI share options

Pension

Private health insurance

Hybrid working

Flexible working hours

Office on Southampton Science Park

Résumé du poste

AccelerComm Ltd. in Southampton, UK seeks a Senior Verification Engineer to verify RTL implementations for ASIC/FPGA IP, using SystemVerilog/UVM within a hybrid work setup.

You will develop verification plans, build UVM environments, run constrained-random tests, and analyze coverage while collaborating across multiple teams and supporting CI workflows. The role requires a degree in electronics/CS and 3+ years in ASIC/FPGA verification.

Qualifications

• Degree in Electronic Engineering, Computer Engineering or a related discipline.
• Experience verifying digital ASIC and/or FPGA designs (min 3 years).
• Strong SystemVerilog and UVM skills.
• Understanding of RTL design principles and hardware implementation.
• Experience with coverage-driven and assertion-based verification.
• Linux proficiency and scripting skills (Python, Tcl or Bash).
• Experience using AI to accelerate verification without sacrificing quality.
• Ability to work across multiple teams.

Responsabilités

• Develop verification plans from design and architecture specifications.
• Create and maintain SystemVerilog/UVM verification environments.
• Develop testbenches, assertions, scoreboards and coverage models.
• Execute directed and constrained-random verification.
• Analyse coverage and debug RTL and verification issues.
• Support subsystem and system-level integration activities.
• Contribute to automation, regression and CI workflows.
• Participate in design reviews and verification sign-off.
• Mentor and support junior colleagues

Connaissances

SystemVerilog

UVM

RTL verification

Linux scripting

Python

Tcl

Cross-team collaboration

Problem solving

Formation

Electronics/Computer Engineering degree

Outils

Python

Tcl

Bash

Description du poste

AccelerComm Ltd. in Southampton, UK seeks a Senior Verification Engineer to verify RTL implementations for ASIC/FPGA IP, using SystemVerilog/UVM within a hybrid work setup.

You will develop verification plans, build UVM environments, run constrained-random tests, and analyze coverage while collaborating across multiple teams and supporting CI workflows. The role requires a degree in electronics/CS and 3+ years in ASIC/FPGA verification.