Senior FPGA Verification Engineer - Hybrid, Profit Share

ITDev; Southampton; Hybrid; GBP 60,000 - 90,000; Full time

Benefits offered by this job

Hybrid work model

Uncapped annual profit share

IET membership fees paid

Support toward Chartered Engineer

Job summary

ITDev in Southampton seeks an experienced FPGA Verification Engineer to verify complex designs across broadcast, communications, aerospace and other advanced markets. You will develop verification strategies and architect reusable SystemVerilog/UVM environments, working alongside experienced FPGA, electronics and software engineers throughout the development lifecycle.

Most work focuses on new products and features; the role offers hybrid working, progression and support toward Chartered

Qualifications

• Commercial experience verifying FPGA designs.
• Strong SystemVerilog and UVM expertise.
• Experience architecting reusable verification environments.
• Knowledge of constrained-random verification and coverage closure.
• Experience developing verification strategies and test plans.
• Strong debugging and fault-investigation skills.
• Experience automating test execution with scripting.
• Experience with revision control.
• Ability to document verification architecture and results.
• Degree in Electronic Engineering.
• Right to work in the UK.

Responsibilities

• Develop UVM-based verification strategies and test plans for complex FPGA designs.
• Architect reusable testbenches.
• Create structured test cases, constrained-random stimulus, scoreboards, assertions and coverage models.
• Define and drive metric-based verification and functional coverage closure.
• Run functional, system-level and regression testing.
• Analyse test results and debug failures with design engineers.
• Develop scripts and automation frameworks for test execution and results analysis.
• Produce documentation covering verification architecture, requirements, test plans and results.
• Contribute to design, code and verification reviews.
• Communicate verification progress to colleagues, clients and other stakeholders.
• Apply quality, assurance and documentation standards across markets.
• Help less-experienced engineers develop verification skills.

Skills

SystemVerilog

UVM

FPGA verification

Testbench development

Python scripting

Git

Education

Electronic Engineering degree

Tools

Questa Formal

Git

Job description

ITDev in Southampton seeks an experienced FPGA Verification Engineer to verify complex designs across broadcast, communications, aerospace and other advanced markets. You will develop verification strategies and architect reusable SystemVerilog/UVM environments, working alongside experienced FPGA, electronics and software engineers throughout the development lifecycle.

Most work focuses on new products and features; the role offers hybrid working, progression and support toward Chartered