Senior RTL Verification Engineer — Hybrid

AccelerComm Ltd; West of England; Hybrid; GBP 65,000 - 90,000; Full time

Benefits offered by this job

Hybrid working

Bonus up to 20% of salary

EMI share options

Pension

Private health insurance

Job summary

AccelerComm Ltd in Bristol, UK is seeking a Senior Verification Engineer to lead RTL verification across ASIC/FPGA platforms. You will develop verification plans, build SystemVerilog/UVM environments and drive coverage-driven verification for complex wireless IP and modem subsystems.

You will collaborate across multiple teams, mentor junior engineers, and contribute to CI workflows. Hybrid working and a competitive salary are offered.

Qualifications

• Degree in Electronic Engineering, Computer Engineering or related discipline.
• At least 3 years experience verifying digital ASIC and/or FPGA designs.
• Strong SystemVerilog and UVM skills.
• Understanding of RTL design principles and hardware implementation.
• Experience with coverage-driven and assertion-based verification.
• Linux proficiency and scripting skills (Python, Tcl or Bash).
• Strong analytical, debugging and problem-solving skills.
• Experience using AI to accelerate verification without sacrificing quality.
• Ability to work across multiple teams.

Responsibilities

• Develop verification plans from design and architecture specifications.
• Create and maintain SystemVerilog/UVM verification environments.
• Develop testbenches, assertions, scoreboards and coverage models.
• Execute directed and constrained-random verification.
• Analyse coverage and debug RTL and verification issues.
• Support subsystem and system-level integration activities.
• Contribute to automation, regression and CI workflows.
• Participate in design reviews and verification sign-off.
• Mentor and support junior colleagues

Skills

SystemVerilog

UVM

Verification

Linux

Python

Tcl

Bash

AI acceleration

Team collaboration

Education

Degree in Electronic Engineering or Computer Engineering

Tools

CI environments

MATLAB

Job description

AccelerComm Ltd in Bristol, UK is seeking a Senior Verification Engineer to lead RTL verification across ASIC/FPGA platforms. You will develop verification plans, build SystemVerilog/UVM environments and drive coverage-driven verification for complex wireless IP and modem subsystems.

You will collaborate across multiple teams, mentor junior engineers, and contribute to CI workflows. Hybrid working and a competitive salary are offered.