Senior NPI Packaging Engineer

Intellectual Capital Resources Ltd

West of England

On-site

GBP 70,000 - 110,000

Full time

4 days ago
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Job summary

Intellectual Capital Resources Ltd. seeks a Senior NPI Packaging Engineer to drive advanced semiconductor packaging from concept through manufacturing handover. You will collaborate with global teams and OSAT partners to deliver reliable, scalable, and cost-effective packaging solutions.

The role requires a Master’s degree and ~6 years of packaging/NPI experience, with strong knowledge of CAD tools and thermal packaging. Fluent English and strong communication are essential.

Qualifications

  • Master’s degree or higher in Electronics, Physics, Materials Science, Engineering, or related field.
  • ~6 years’ experience in semiconductor packaging/NPI development.
  • Strong knowledge of semiconductor assembly processes and package technologies.
  • Experience with supplier design rules and 3D CAD tools (AutoCAD).
  • Understanding of package thermal characterization.
  • Ability to work with global cross-functional teams and external partners.
  • Strong ownership, communication, and technical presentation skills.
  • Fluent English communication skills.

Responsibilities

  • Develop and optimize advanced semiconductor packages (wirebond, flip-chip, embedded, DFN/QFN, BGA, SiP, WLCSP).
  • Evaluate packaging technologies and drive supplier/manufacturing partner development.
  • Design packages to meet electrical, thermal, and form-factor requirements, including back-end wafer process considerations.
  • Improve packaging design processes, tools, and methodologies for efficient NPI delivery.
  • Support validation, testing, customer requirements, package drawings, thermal models, and technical documentation.
  • Analyze assembly data and communicate technical findings.
  • Maintain awareness of industry and academic developments in semiconductor packaging.

Skills

Semiconductor packaging & NPI
English communication
Global cross-functional teamwork
Technical presentation

Education

Master’s degree or higher in Electronics/Physics/Materials Science/Engineering

Tools

AutoCAD
Cadence Allegro X APD
Klayout

Job description

Our international client is currently searching for a Senior NPI Packaging Engineer to lead the development of advanced semiconductor packaging solutions, managing the full product lifecycle from package concept and technology selection through design, validation, qualification, and manufacturing handover. Working closely with global internal teams and OSAT partners to deliver reliable, scalable, and cost-effective packaging solutions will be required.

Key responsibilities
  • Develop and optimize advanced semiconductor packages (wirebond, flip-chip, embedded, DFN/QFN, BGA, SiP, WLCSP)
  • Evaluate packaging technologies and drive supplier/manufacturing partner development
  • Design packages to meet electrical, thermal, and form-factor requirements, including back-end wafer process considerations
  • Improve packaging design processes, tools, and methodologies for efficient NPI delivery
  • Support validation, testing, customer requirements, package drawings, thermal models, and technical documentation
  • Analyze assembly data and communicate technical findings
  • Maintain awareness of industry and academic developments in semiconductor packaging
Requirements
  • Master’s degree or higher in Electronics, Physics, Materials Science, Engineering, or related field
  • ~6 years’ experience in semiconductor packaging/NPI development
  • Strong knowledge of semiconductor assembly processes and package technologies
  • Experience with supplier design rules and 3D CAD tools (e.g., AutoCAD)
  • Understanding of package thermal characterization
  • Ability to work with global cross-functional teams and external partners
  • Strong ownership, communication, and technical presentation skills
  • Fluent English communication skills
Preferred experience
  • 3D multiphysics simulation tools (Cadence, ANSYS, or equivalent)
  • Package reliability/qualification testing (MSL, TC, HAST, HTS, JEDEC standards)
  • Structured problem-solving methods (8D, DOE)
  • Package layout tools such as Cadence Allegro X APD and Klayout
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