Senior Design Verification Engineer - CPU / SoC

European Tech Recruit; Cambridge; On-site; GBP 70,000 - 110,000; Full time

Job summary

We are seeking an experienced Senior Design Verification Engineer for a UK semiconductor leader to join a high-caliber team validating high‑performance CPUs and SoCs.

This permanent, onsite role is based in Cambridge. You will work with SOC Architects to prove correctness of micro‑architectures before release to millions of global users, delivering rigorous test and coverage plans.

You will build scalable verification environments and drive regressions, reporting progress with advanced metrics.

Qualifications

• Experience with CPU technologies including cache coherence, memory ordering, branch prediction, renaming, and speculative execution.
• Experience with RIS at Block and Subsystem levels.
• Proficient with simulators, waveform viewers, and formal proof tools.
• Knowledge of formal verification, assertions, and silicon bring-up.

Responsibilities

• Validate high-level system requirements and micro-architectural concepts.
• Develop detailed test and coverage plans for CPU domains.
• Build scalable and portable verification environments with stimuli, checkers, assertions, trackers.
• Perform regressions and deep-dive debugging of test failures.
• Report progress using metrics like functional coverage and bug density.

Skills

CPU verification

Design verification

SystemVerilog

UVM

Test planning

Debugging

Tools

Simulators

Waveform viewers

Formal Proof Tools

Formal Verification tools

Job description

We are currently partnered with an industry leading semiconductor giant in the UK looking to expand their team with an experienced Design Verification Engineer to join a high caliber team of engineers working on high-performance CPUs and SoC validation. In this role, you will work closely with Architects to prove the correctness of complex micro-architectures before they reach the hands of millions of global users.

This is a permanent position based in Cambridge - please note this is a full onsite role.

Key responsibilities for this Senior Design Verification Engineer position:

• Work with SOC Architects to validate high-level system requirements and micro-architectural concepts.
• Develop detailed Test and Coverage plans for specific functional domains within the CPU.
• Build scalable and portable verification environments, including Stimulus, Checkers, Assertions, and Trackers.
• Enable all features under your care through rigorous regressions and deep-dive debugging of test failures.
• Report progress using advanced metrics, including functional coverage and bug density.

Key requirements:

• Extensive experience working with CPU technologies with proven skills in domains such as Cache Coherence, Memory Ordering, Branch Prediction, Renaming, and Speculative Execution.
• Experience with Random Instruction Sequencing (RIS) at the Block and Subsystem levels.
• In-depth experience with Simulators, Waveform viewers, and Formal Proof Tools.
• Familiarity with Formal Verification, Assertions, and Silicon bring-up.

Keywords:

CPU Verification / Design Verification / DV / SystemVerilog / UVM / Cache Coherence / Branch Prediction / Formal Verification / RIS / SOC / Assembly / Cambridge / Silicon Bring-up