Senior CPU Design Verification Engineer – CPU / SoC / SystemVerilog / UVM

European Tech Recruit; Cambridge; On-site; GBP 85,000 - 120,000; Full time

Job summary

European Tech Recruit is seeking a Senior CPU Design Verification Engineer to verify CPU and SoC concepts, develop testbenches and coverage, and drive regression cycles for product launch readiness.

You will work with CPU/SoC architects, develop scalable verification environments, and debug complex verification issues, contributing to design readiness and verification metrics across the project.

Qualifications

• Experience in CPU design verification.
• Experience with CPU and SoC architectures and microarchitectures.
• Experience developing verification plans and coverage.
• Experience building scalable verification environments.
• Experience developing verification environments and testbenches.
• Experience stimulus generation, checkers, assertions, trackers, coverage.
• Experience executing verification plans and regressions.
• Experience bring-up of design and verification environments.
• Experience debugging verification failures.
• Track verification progress using bugs and coverage metrics.

Responsibilities

• Collaborate with CPU/SoC architects to understand concepts and requirements.
• Create detailed test and coverage plans based on architecture.
• Develop scalable verification methodologies across environments.
• Build verification environments and components.
• Develop stimulus, checkers, assertions, trackers, and coverage mechanisms.
• Prepare verification plans and testbenches for the domain.
• Run verification plans through the design verification lifecycle.
• Bring up designs and verification environments.
• Enable regressions covering assigned features.
• Debug test failures and support resolution of issues.
• Report progress with bugs and coverage metrics.
• Support validation of microarchitectural concepts through launch readiness.

Skills

CPU design verification

CPU/SoC architectures

verification plans

verification environments

stimulus generation

checkers

assertions

debugging verifications

regressions tracking

metrics reporting

Tools

SystemVerilog

UVM

Job description

Senior CPU Design Verification Engineer – CPU / SoC / SystemVerilog / UVM

We are currently partnered with a semiconductor technology organisation developing CPU and SoC architectures. They are looking to hire a Senior CPU Design Verification Engineer to work closely with CPU and SoC architects, validating microarchitectural concepts and ensuring selected areas of CPU design are thoroughly verified and ready for product launch.

The role covers verification planning, methodology development, testbench and verification environment development, regression execution, debug, and coverage tracking across a defined functional domain.

Key responsibilities

• Work closely with CPU and SoC architects to understand architectural concepts and high-level system requirements
• Develop detailed test and coverage plans based on CPU architecture and microarchitecture
• Develop scalable and portable verification methodologies across different environments
• Develop verification environments and their associated components
• Develop stimulus, checkers, assertions, trackers, and coverage mechanisms
• Develop verification plans and testbenches for the assigned functional domain
• Execute verification plans throughout the design verification lifecycle
• Perform design bring-up and verification environment bring-up
• Enable regressions covering features within the assigned area
• Debug test failures and support resolution of verification issues
• Track and report design verification progress using metrics including bugs and coverage
• Support validation of CPU and SoC microarchitectural concepts through to launch readiness

Key requirements

• Experience in CPU design verification
• Experience working with CPU and SoC architectures and microarchitectures
• Experience developing detailed verification and coverage plans
• Experience developing scalable and portable verification environments
• Experience developing verification environments and testbenches
• Experience with stimulus generation, checkers, assertions, trackers, and coverage
• Experience executing verification plans and regressions
• Experience with design and verification environment bring-up
• Experience debugging verification test failures
• Experience tracking verification progress using bugs, coverage, and related metricsAbility to work closely with CPU and SoC architecture teams

Keywords

By applying to this role, you understand that we may collect your personal data and process it in line with our privacy policy.

https://eu-recruit.com/wp-content/uploads/2025/01/European-Tech-Recruit-Privacy-Notice-2025.pdf