RISC-V CPU Verification Engineer (UK)

Codasip

West of England

On-site

GBP 60,000 - 90,000

Full time

2 days ago
Be an early applicant
Application generator

Get a reply from this employer — a resume and cover letter tailored to exactly what they’re hiring for.

Get past ATS filters

Job summary

Codasip in the UK invites experienced Verification Engineers to join our design centers in Cambridge or Bristol. You will verify RISC-V processors and extensions, develop test benches, and shape verification strategies across blocks and subsystems.

This role requires strong SystemVerilog, Python and C++ skills, Linux automation, and hands-on ownership of verification tasks. You will collaborate with international teams to deliver robust, cyber-resilient architectures and push cutting-edge CPU

Qualifications

  • Commercial experience with functional processor verification methodologies (CPU/ASIC) including simulators, test generation, coverage collection, and gate-level simulation.
  • Knowledge of verifying CPU architectures or other IP.
  • Fluency with SystemVerilog, Python, C++, Rust, etc.
  • Past verification ownership of a design block.
  • Linux knowledge to automate tasks.
  • Familiarity with Git or SVN version control.
  • Knowledge of RISC-V Architecture.
  • Strong analytical and teamwork skills.

Responsibilities

  • Verify RISC-V processors and extensions.
  • Develop verification solutions (test benches and components, stimulus generation, formal environments).
  • Collaborate with engineers across the verification lifecycle to deliver components end-to-end.
  • Define verification strategies for blocks and sub-systems and select the right tools.
  • Review specifications and provide verification feedback.
  • Run simulations, identify bugs, and perform root-cause analysis of issues.
  • Define, estimate, prioritize, and track your own work.
  • Craft automated verification flows.

Skills

SystemVerilog
Python
C++
Linux
RISC-V
Debugging

Job description

Codasip in the UK invites experienced Verification Engineers to join our design centers in Cambridge or Bristol. You will verify RISC-V processors and extensions, develop test benches, and shape verification strategies across blocks and subsystems.

This role requires strong SystemVerilog, Python and C++ skills, Linux automation, and hands-on ownership of verification tasks. You will collaborate with international teams to deliver robust, cyber-resilient architectures and push cutting-edge CPU

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

RISC-V Verification Engineer – UK Design Center
RISC-V Verification Engineer – UK Design Center

Codasip • Cambridge

On-site
GBP 55,000 - 75,000
Senior Verification Engineer – RISC-V & CHERI Security (UK)
Senior Verification Engineer – RISC-V & CHERI Security (UK)

Codasip • West of England

Hybrid
GBP 60,000 - 90,000
Verification Engineer
Verification Engineer

Codasip • West of England

Hybrid
GBP 60,000 - 90,000
UK-Based Verification Lead: RISC-V & IP Strategy
UK-Based Verification Lead: RISC-V & IP Strategy

Codasip • Fen Ditton

On-site
GBP 90,000 - 130,000
UK Verification Manager — RISC-V & IP Leadership
UK Verification Manager — RISC-V & IP Leadership

Codasip • West of England

Hybrid
GBP 120,000 - 150,000
Design Verification Engineer
Design Verification Engineer

Codasip • Cambridge

On-site
GBP 55,000 - 75,000
Design Verification Engineer
Design Verification Engineer

Codasip • West of England

On-site
GBP 60,000 - 90,000
Senior Design Verification Engineer - CPU / SoC
Senior Design Verification Engineer - CPU / SoC

European Tech Recruit • Cambridge

On-site
GBP 70,000 - 110,000
Verification Manager
Verification Manager

Codasip • West of England

Hybrid
GBP 120,000 - 150,000
Verification Manager
Verification Manager

Codasip • Fen Ditton

On-site
GBP 90,000 - 130,000