UK-Based Verification Lead: RISC-V & IP Strategy

Codasip; Fen Ditton; On-site; GBP 90,000 - 130,000; Full time

Job summary

Codasip, a leader in CHERI‑RISC‑V architectures, seeks a DV Manager to expand the Verification team across multiple Design Centers in the UK, including Bristol and Cambridge.

You will drive project ownership, mentor engineers, and shape verification strategy while collaborating with cross‑functional teams to deliver secure, high‑quality IP across the Codasip portfolio, contributing to company strategy and architectural decisions.

Qualifications

• Extensive semiconductor verification leadership experience.
• Experience with CPU/ASIC verification methodologies (simulators, coverage, gate-level).
• Knowledge of RISC-V Architecture.
• Proven ability to manage workload in dynamic environment.
• Excellent leadership and communication skills.

Responsibilities

• Lead the expansion of the Verification team across Design Centers, aligning with company strategy.
• Collaborate with other Verification Leads to share responsibilities and optimize resources.
• Verify RISC-V processors and extensions.
• Take ownership of IP Verification projects and deliverables.
• Contribute to determining the company’s verification strategy.
• Provide technical leadership and build a culture of excellence in verification practices.
• Partner with cross-functional teams to optimize collaboration and project execution.
• Stay abreast of industry trends and advancements to drive innovation.

Skills

Leadership

Verification leadership

RISC-V

CPU verification

Tools

N/A

Job description

Codasip, a leader in CHERI‑RISC‑V architectures, seeks a DV Manager to expand the Verification team across multiple Design Centers in the UK, including Bristol and Cambridge.

You will drive project ownership, mentor engineers, and shape verification strategy while collaborating with cross‑functional teams to deliver secure, high‑quality IP across the Codasip portfolio, contributing to company strategy and architectural decisions.