Senior Design Verification Engineer - CPU / SoC

European Tech Recruit; Cambridge; On-site; GBP 70,000 - 110,000; Full time

Job summary

European Tech Recruit seeks an experienced Senior Design Verification Engineer in Cambridge to validate CPU/micro-architectures. You will work with SOC Architects to prove correctness before release, building scalable verification environments and driving regressions to ensure feature completeness.

The role is a permanent on-site position in Cambridge, requiring deep expertise in CPUs, verification methodologies, and debug techniques to deliver high‑quality silicon bring‑up.

Qualifications

• Experience validating CPU architectures and micro‑architectures.
• Proficiency with SystemVerilog, UVM and formal verification.
• Hands-on with simulation, waveform analysis and debug tooling.

Responsibilities

• Validate high-level system requirements with SOC Architects.
• Develop detailed Test and Coverage plans for CPU domains.
• Build scalable verification environments with Stimulus, Checkers, Assertions, Trackers.
• Run regressions and debug test failures to enable features under your care.
• Report progress using metrics like functional coverage and bug density.

Skills

CPU Verification

SystemVerilog

UVM

Formal Verification

RIS (Random Instruction Sequencing)

Simulation Tools

Silicon bring-up

Tools

Simulators

Waveform viewers

Formal Proof Tools

Job description

We are currently partnered with an industry leading semiconductor giant in the UK looking to expand their team with an experienced Design Verification Engineer to join a high caliber team of engineers working on high-performance CPUs and SoC validation. In this role, you will work closely with Architects to prove the correctness of complex micro-architectures before they reach the hands of millions of global users.

This is a permanent position based in Cambridge - please note this is a full onsite role.

Key responsibilities for this Senior Design Verification Engineer position:

• Work with SOC Architects to validate high-level system requirements and micro-architectural concepts.
• Develop detailed Test and Coverage plans for specific functional domains within the CPU.
• Build scalable and portable verification environments, including Stimulus, Checkers, Assertions, and Trackers.
• Enable all features under your care through rigorous regressions and deep-dive debugging of test failures.
• Report progress using advanced metrics, including functional coverage and bug density.

Key requirements:

• Extensive experience working with CPU technologies with proven skills in domains such as Cache Coherence, Memory Ordering, Branch Prediction, Renaming, and Speculative Execution.
• Experience with Random Instruction Sequencing (RIS) at the Block and Subsystem levels.
• In-depth experience with Simulators, Waveform viewers, and Formal Proof Tools.
• Familiarity with Formal Verification, Assertions, and Silicon bring-up.

Keywords:

CPU Verification / Design Verification / DV / SystemVerilog / UVM / Cache Coherence / Branch Prediction / Formal Verification / RIS / SOC / Assembly / Cambridge / Silicon Bring-up

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