Memory Subsystem Performance Architect

Apple Inc.; Cambridge; On-site; GBP 147,000 - 221,000; Full time

Benefits offered by this job

Employee stock plans

Discretionary bonuses

Educational expense reimbursement

Job summary

Apple Inc. is seeking a CPU Performance Architect focused on the memory subsystem to join the Platform Architecture team.

You will work on optimizing CPU and cache micro-architecture across iPhone, iPad, Mac, and server lines, identifying bottlenecks and evaluating improvements through modeling and RTL collaboration. You will partner with experienced CPU and SoC designers to drive data-driven decisions, maintain the simulation environment, and help advance next-generation performance while

Qualifications

• CPU and SOC architecture or micro-architecture experience.
• Experience with performance simulation environments.
• Proficient in C/C++ (OOP).
• Experience with scripting languages such as Python or Perl.
• Knowledge of memory latency tolerance techniques.

Responsibilities

• Define and optimize CPU and cache micro-architecture.
• Identify bottlenecks by analyzing single/multi-threaded workloads.
• Collaborate with CPU/SoC designers to assess feasibility via modeling.
• Maintain and improve the simulation environment for data-driven decisions.
• Contribute to productivity improvements for the team.

Skills

CPU/SOC architecture

Performance simulation environments

C/C++ (OO)

Python or Perl scripting

Memory subsystem knowledge

SIMD/accelerator architectures

MP performance

Uncertainty navigation

Research environment experience

Education

MS or PhD in Electrical or Computer Engineering or Computer Science

Job description

Apple Inc. is seeking a CPU Performance Architect focused on the memory subsystem to join the Platform Architecture team.

You will work on optimizing CPU and cache micro-architecture across iPhone, iPad, Mac, and server lines, identifying bottlenecks and evaluating improvements through modeling and RTL collaboration. You will partner with experienced CPU and SoC designers to drive data-driven decisions, maintain the simulation environment, and help advance next-generation performance while