Lead Ultra-Low Latency C++/FPGA Engineer

JPMorgan Chase & Co.

Greater London

Sur place

GBP 120 000 - 180 000

Plein temps

14 jours+

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Résumé du poste

JPMorgan Chase & Co. in London seeks an Ultra Low Latency Lead Software Engineer to design, build, and operate market gateway solutions with FPGA acceleration, delivering deterministic performance for high-speed trading.

You will collaborate with hardware and software teams, drive latency optimization, implement end-to-end pipelines, and lead development across Unix/Linux environments, CI/CD, and secure engineering practices to support global markets.

Qualifications

Proficiency in modern C++ on Unix/Linux with multithreading and OO design.
Hands-on experience in design, development, testing, and production stability.
Scripting skills (Python, Perl, Shell) for automation.
Knowledge of Agile, CI/CD, resiliency, and security.

Responsabilités

Design, build, and operate market gateway solutions with FPGA acceleration.
Develop high-quality C++ code for trading connectivity and risk controls on Unix/Linux.
Implement end-to-end low-latency client setups and production rollout.
Automate remediation to improve operational stability.
Establish and execute test strategies for latency, throughput, and resiliency.
Lead adoption of AI-assisted engineering practices with validated outputs.