Infrared IC Design Engineer — Hybrid, Advanced Imaging

Leonardo UK Ltd; Southampton; Hybride; GBP 55 000 - 90 000; Plein temps

Avantages offerts par ce poste

12 flexi-days per year

Pension scheme with employer contrib.

Private healthcare option

Training via Coursera/LinkedIn

Bonus scheme

Hybrid working

Refer a friend bonus

Flexible benefits up to £500

Résumé du poste

Leonardo UK Ltd in Southampton is seeking an Integrated Circuit (IC) Design Engineer to design and verify analogue, mixed-signal and digital ICs for infrared imaging and remote sensing applications. The role offers hybrid working with a flexible approach and involves generating verification evidence and preparing technical reports.

You will work in a mixed-signal IC design team, translating requirements into verifiable solutions and supporting design processes, layouts and testing at transistor

Qualifications

• Experience with IC design analogue, mixed signal and/or Digital IC design skills.
• Transistor/block level layout understanding.
• Block level design, schematic capture and simulation experience.

Responsabilités

• Work to design specifications.
• Complete design and development tasks across digital, analogue and mixed-signal ICs.
• Generate and capture verification evidence for designs.
• Follow design processes and procedures.
• Complete lab first article test and validation from manufactured samples.
• Prepare technical documentation and reports.

Connaissances

IC Design Analog

Mixed-signal Design

Digital IC Design

Transistor-level Layout

Block-level Design

Schematic Capture

Outils

Cadence tool suite

Description du poste

Leonardo UK Ltd in Southampton is seeking an Integrated Circuit (IC) Design Engineer to design and verify analogue, mixed-signal and digital ICs for infrared imaging and remote sensing applications. The role offers hybrid working with a flexible approach and involves generating verification evidence and preparing technical reports.

You will work in a mixed-signal IC design team, translating requirements into verifiable solutions and supporting design processes, layouts and testing at transistor